Documentation/devicetree/bindings/phy/google,lga-usb-phy.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/google,lga-usb-phy.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/phy/google,lga-usb-phy.yaml
Extension
.yaml
Size
3731 bytes
Lines
134
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2025, Google LLC
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/google,lga-usb-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Google Tensor Series G5 (Laguna) USB PHY

maintainers:
  - Roy Luo <royluo@google.com>

description:
  Describes the USB PHY interfaces integrated with the DWC3 USB controller on
  Google Tensor SoCs, starting with the G5 generation (laguna).
  Two specific PHY IPs from Synopsys are integrated, including eUSB 2.0 PHY IP
  and USB3.2/DisplayPort combo PHY IP.

properties:
  compatible:
    const: google,lga-usb-phy

  reg:
    items:
      - description: USB3.2/DisplayPort combo PHY core registers.
      - description: USB3.2/DisplayPort combo PHY Type-C Assist registers.
      - description: eUSB 2.0 PHY core registers.
      - description: Top-level wrapper registers for the integrated PHYs.

  reg-names:
    items:
      - const: usb3_core
      - const: usb3_tca
      - const: usb2_core
      - const: usbdp_top

  "#phy-cells":
    description: |
      The phandle's argument in the PHY specifier selects one of the three
      following PHY interfaces.
      - 0 for USB high-speed.
      - 1 for USB super-speed.
      - 2 for DisplayPort.
    const: 1

  clocks:
    items:
      - description: USB2 PHY clock.
      - description: USB2 PHY APB clock.
      - description: USB3.2/DisplayPort combo PHY clock.
      - description: USB3.2/DisplayPort combo PHY firmware clock.

  clock-names:
    items:
      - const: usb2
      - const: usb2_apb
      - const: usb3
      - const: usb3_fw

  resets:
    items:
      - description: USB2 PHY reset.
      - description: USB2 PHY APB reset.
      - description: USB3.2/DisplayPort combo PHY reset.

  reset-names:
    items:
      - const: usb2
      - const: usb2_apb
      - const: usb3

Annotation

Implementation Notes