Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/phy/lantiq,vrx200-pcie-phy.yaml
Extension
.yaml
Size
2288 bytes
Lines
96
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/lantiq,vrx200-pcie-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Lantiq VRX200 and ARX300 PCIe PHY

maintainers:
  - Martin Blumenstingl <martin.blumenstingl@googlemail.com>

properties:
  "#phy-cells":
    const: 1
    description: selects the PHY mode as defined in <dt-bindings/phy/phy-lantiq-vrx200-pcie.h>

  compatible:
    enum:
      - lantiq,vrx200-pcie-phy
      - lantiq,arx300-pcie-phy

  reg:
    maxItems: 1

  clocks:
    items:
      - description: PHY module clock
      - description: PDI register clock

  clock-names:
    items:
      - const: phy
      - const: pdi

  resets:
    items:
      - description: exclusive PHY reset line
      - description: shared reset line between the PCIe PHY and PCIe controller

  reset-names:
    items:
      - const: phy
      - const: pcie

  lantiq,rcu:
    $ref: /schemas/types.yaml#/definitions/phandle
    description: phandle to the RCU syscon

  lantiq,rcu-endian-offset:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: the offset of the endian registers for this PHY instance in the RCU syscon

  lantiq,rcu-big-endian-mask:
    $ref: /schemas/types.yaml#/definitions/uint32
    description: the mask to set the PDI (PHY) registers for this PHY instance to big endian

  big-endian:
    description: Configures the PDI (PHY) registers in big-endian mode
    type: boolean

  little-endian:
    description: Configures the PDI (PHY) registers in big-endian mode
    type: boolean

required:
  - "#phy-cells"
  - compatible
  - reg
  - clocks
  - clock-names

Annotation

Implementation Notes