Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/phy/marvell,comphy-cp110.yaml- Extension
.yaml- Size
- 3417 bytes
- Lines
- 168
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/marvell,comphy-cp110.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell MVEBU COMPHY Controller
maintainers:
- Miquel Raynal <miquel.raynal@bootlin.com>
description: >
COMPHY controllers can be found on the following Marvell MVEBU SoCs:
* Armada 7k/8k (on the CP110)
* Armada 3700
It provides a number of shared PHYs used by various interfaces (network, SATA,
USB, PCIe...).
properties:
compatible:
enum:
- marvell,comphy-cp110
- marvell,comphy-a3700
reg:
minItems: 1
items:
- description: Generic COMPHY registers
- description: Lane 1 (PCIe/GbE) registers (Armada 3700)
- description: Lane 0 (USB3/GbE) registers (Armada 3700)
- description: Lane 2 (SATA/USB3) registers (Armada 3700)
reg-names:
minItems: 1
items:
- const: comphy
- const: lane1_pcie_gbe
- const: lane0_usb3_gbe
- const: lane2_sata_usb3
'#address-cells':
const: 1
'#size-cells':
const: 0
clocks:
minItems: 1
maxItems: 3
clock-names:
minItems: 1
maxItems: 3
marvell,system-controller:
description: Phandle to the Marvell system controller (CP110 only)
$ref: /schemas/types.yaml#/definitions/phandle
patternProperties:
'^phy@[0-5]$':
description: A COMPHY lane child node
type: object
additionalProperties: false
properties:
reg:
description: COMPHY lane number
maximum: 5
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.