Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/phy/mediatek,xsphy.yaml
Extension
.yaml
Size
5603 bytes
Lines
216
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (c) 2020 MediaTek
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/mediatek,xsphy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek XS-PHY Controller

maintainers:
  - Chunfeng Yun <chunfeng.yun@mediatek.com>

description: |
  The XS-PHY controller supports physical layer functionality for USB3.1
  GEN2 controller on MediaTek SoCs.

  Banks layout of xsphy
  ----------------------------------
  port        offset    bank
  u2 port0    0x0000    MISC
              0x0100    FMREG
              0x0300    U2PHY_COM
  u2 port1    0x1000    MISC
              0x1100    FMREG
              0x1300    U2PHY_COM
  u2 port2    0x2000    MISC
              ...
  u31 common  0x3000    DIG_GLB
              0x3100    PHYA_GLB
  u31 port0   0x3400    DIG_LN_TOP
              0x3500    DIG_LN_TX0
              0x3600    DIG_LN_RX0
              0x3700    DIG_LN_DAIF
              0x3800    PHYA_LN
  u31 port1   0x3a00    DIG_LN_TOP
              0x3b00    DIG_LN_TX0
              0x3c00    DIG_LN_RX0
              0x3d00    DIG_LN_DAIF
              0x3e00    PHYA_LN
              ...
  DIG_GLB & PHYA_GLB are shared by U31 ports.

properties:
  $nodename:
    pattern: "^xs-phy@[0-9a-f]+$"

  compatible:
    items:
      - enum:
          - mediatek,mt3611-xsphy
          - mediatek,mt3612-xsphy
          - mediatek,mt7988-xsphy
      - const: mediatek,xsphy

  reg:
    description:
      Register shared by multiple U3 ports, exclude port's private register,
      if only U2 ports provided, shouldn't use the property.
    maxItems: 1

  "#address-cells":
    enum: [1, 2]

  "#size-cells":
    enum: [1, 2]

  ranges: true

  mediatek,src-ref-clk-mhz:
    description:

Annotation

Implementation Notes