Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/phy/microchip,sparx5-serdes.yaml- Extension
.yaml- Size
- 2986 bytes
- Lines
- 116
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/microchip,sparx5-serdes.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip Sparx5 Serdes controller
maintainers:
- Steen Hegelund <steen.hegelund@microchip.com>
- Daniel Machon <daniel.machon@microchip.com>
description: |
The Sparx5 SERDES interfaces share the same basic functionality, but
support different operating modes and line rates.
The following list lists the SERDES features:
* RX Adaptive Decision Feedback Equalizer (DFE)
* Programmable continuous time linear equalizer (CTLE)
* Rx variable gain control
* Rx built-in fault detector (loss-of-lock/loss-of-signal)
* Adjustable tx de-emphasis (FFE)
* Tx output amplitude control
* Supports rx eye monitor
* Multiple loopback modes
* Prbs generator and checker
* Polarity inversion control
SERDES6G:
The SERDES6G is a high-speed SERDES interface, which can operate at
the following data rates:
* 100 Mbps (100BASE-FX)
* 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
* 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
* 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
SERDES10G
The SERDES10G is a high-speed SERDES interface, which can operate at
the following data rates:
* 100 Mbps (100BASE-FX)
* 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
* 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
* 5 Gbps (QSGMII/USGMII)
* 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
* 10 Gbps (10G-USGMII)
* 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
SERDES25G
The SERDES25G is a high-speed SERDES interface, which can operate at
the following data rates:
* 1.25 Gbps (SGMII/1000BASE-X/1000BASE-KX)
* 3.125 Gbps (2.5GBASE-X/2.5GBASE-KX)
* 5 Gbps (QSGMII/USGMII)
* 5.15625 Gbps (5GBASE-KR/5G-USXGMII)
* 10 Gbps (10G-USGMII)
* 10.3125 Gbps (10GBASE-R/10GBASE-KR/USXGMII)
* 25.78125 Gbps (25GBASE-KR/25GBASE-CR/25GBASE-SR/25GBASE-LR/25GBASE-ER)
lan969x has ten SERDES10G interfaces that share the same features, operating
modes and data rates as the equivalent Sparx5 SERDES10G interfaces.
properties:
$nodename:
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.