Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/phy/phy-cadence-sierra.yaml
Extension
.yaml
Size
4274 bytes
Lines
167
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/phy-cadence-sierra.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cadence Sierra PHY

description:
  This binding describes the Cadence Sierra PHY. Sierra PHY supports multilink
  multiprotocol combinations including protocols such as PCIe, USB etc.

maintainers:
  - Swapnil Jakhade <sjakhade@cadence.com>
  - Yuti Amonkar <yamonkar@cadence.com>

properties:
  compatible:
    enum:
      - cdns,sierra-phy-t0
      - ti,sierra-phy-t0

  '#address-cells':
    const: 1

  '#size-cells':
    const: 0

  '#clock-cells':
    const: 1

  resets:
    minItems: 1
    items:
      - description: Sierra PHY reset.
      - description: Sierra APB reset. This is optional.

  reset-names:
    minItems: 1
    items:
      - const: sierra_reset
      - const: sierra_apb

  reg:
    maxItems: 1
    description:
      Offset of the Sierra PHY configuration registers.

  reg-names:
    const: serdes

  clocks:
    minItems: 2
    maxItems: 4

  clock-names:
    minItems: 2
    items:
      - const: cmn_refclk_dig_div
      - const: cmn_refclk1_dig_div
      - const: pll0_refclk
      - const: pll1_refclk

  cdns,autoconf:
    type: boolean
    description:
      A boolean property whose presence indicates that the PHY registers will be
      configured by hardware. If not present, all sub-node optional properties
      must be provided.

Annotation

Implementation Notes