Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
Extension
.yaml
Size
5927 bytes
Lines
217
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/phy-cadence-torrent.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cadence Torrent SD0801 PHY

description:
  This binding describes the Cadence SD0801 PHY (also known as Torrent PHY)
  hardware included with the Cadence MHDP DisplayPort controller. Torrent
  PHY also supports multilink multiprotocol combinations including protocols
  such as PCIe, USB, SGMII, QSGMII etc.

maintainers:
  - Swapnil Jakhade <sjakhade@cadence.com>
  - Yuti Amonkar <yamonkar@cadence.com>

properties:
  compatible:
    enum:
      - cdns,torrent-phy
      - ti,j7200-serdes-10g
      - ti,j721e-serdes-10g

  '#address-cells':
    const: 1

  '#size-cells':
    const: 0

  '#clock-cells':
    const: 1

  clocks:
    minItems: 1
    maxItems: 2
    description:
      PHY input reference clocks - refclk (for PLL0) & pll1_refclk (for PLL1).
      pll1_refclk is optional and used for multi-protocol configurations requiring
      separate reference clock for each protocol.
      Same refclk is used for both PLL0 and PLL1 if no separate pll1_refclk is used.
      Optional parent clock (phy_en_refclk) to enable a reference clock output feature
      on some platforms to output either derived or received reference clock.

  clock-names:
    minItems: 1
    items:
      - const: refclk
      - enum: [ pll1_refclk, phy_en_refclk ]

  reg:
    minItems: 1
    items:
      - description: Offset of the Torrent PHY configuration registers.
      - description: Offset of the DPTX PHY configuration registers.

  reg-names:
    minItems: 1
    items:
      - const: torrent_phy
      - const: dptx_phy

  resets:
    minItems: 1
    items:
      - description: Torrent PHY reset.
      - description: Torrent APB reset. This is optional.

  reset-names:

Annotation

Implementation Notes