Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/phy/qcom,qcs615-qmp-usb3dp-phy.yaml
Extension
.yaml
Size
2505 bytes
Lines
112
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/qcom,qcs615-qmp-usb3dp-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Qualcomm QMP USB3-DP PHY controller (DP, QCS615)

maintainers:
  - Xiangxu Yin <xiangxu.yin@oss.qualcomm.com>

description:
  The QMP PHY controller supports physical layer functionality for both USB3
  and DisplayPort over USB-C. While it enables mode switching between USB3 and
  DisplayPort, but does not support combo mode.

properties:
  compatible:
    enum:
      - qcom,qcs615-qmp-usb3-dp-phy

  reg:
    maxItems: 1

  clocks:
    maxItems: 4

  clock-names:
    items:
      - const: aux
      - const: ref
      - const: cfg_ahb
      - const: pipe

  resets:
    maxItems: 2

  reset-names:
    items:
      - const: phy_phy
      - const: dp_phy

  vdda-phy-supply: true

  vdda-pll-supply: true

  "#clock-cells":
    const: 1
    description:
      See include/dt-bindings/phy/phy-qcom-qmp.h

  "#phy-cells":
    const: 1
    description:
      See include/dt-bindings/phy/phy-qcom-qmp.h

  qcom,tcsr-reg:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      - items:
          - description: phandle to TCSR hardware block
          - description: offset of the VLS CLAMP register
          - description: offset of the PHY mode register
    description: Clamp and PHY mode register present in the TCSR

required:
  - compatible
  - reg
  - clocks
  - clock-names

Annotation

Implementation Notes