Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml

File Facts

System: Linux kernel
Corpus path: Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml
Extension: .yaml
Size: 5278 bytes
Lines: 176
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: configuration, schema, or hardware description
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

No C-style include directives detected by the generator.

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright 2023 Realtek Semiconductor Corporation
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/realtek,usb2phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Realtek DHC SoCs USB 2.0 PHY

maintainers:
  - Stanley Chang <stanley_chang@realtek.com>

description: |
  Realtek USB 2.0 PHY support the digital home center (DHC) RTD series SoCs.
  The USB 2.0 PHY driver is designed to support the XHCI controller. The SoCs
  support multiple XHCI controllers. One PHY device node maps to one XHCI
  controller.

  RTD1295/RTD1619 SoCs USB
  The USB architecture includes three XHCI controllers.
  Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on some
  controllers.
  XHCI controller#0 -- usb2phy -- phy#0
                    |- usb3phy -- phy#0
  XHCI controller#1 -- usb2phy -- phy#0
  XHCI controller#2 -- usb2phy -- phy#0
                    |- usb3phy -- phy#0

  RTD1395 SoCs USB
  The USB architecture includes two XHCI controllers.
  The controller#0 has one USB 2.0 PHY. The controller#1 includes two USB 2.0
  PHY.
  XHCI controller#0 -- usb2phy -- phy#0
  XHCI controller#1 -- usb2phy -- phy#0
                               |- phy#1

  RTD1319/RTD1619b SoCs USB
  The USB architecture includes three XHCI controllers.
  Each XHCI maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#2.
  XHCI controller#0 -- usb2phy -- phy#0
  XHCI controller#1 -- usb2phy -- phy#0
  XHCI controller#2 -- usb2phy -- phy#0
                    |- usb3phy -- phy#0

  RTD1319d SoCs USB
  The USB architecture includes three XHCI controllers.
  Each xhci maps to one USB 2.0 PHY and map one USB 3.0 PHY on controllers#0.
  XHCI controller#0 -- usb2phy -- phy#0
                    |- usb3phy -- phy#0
  XHCI controller#1 -- usb2phy -- phy#0
  XHCI controller#2 -- usb2phy -- phy#0

  RTD1312c/RTD1315e SoCs USB
  The USB architecture includes three XHCI controllers.
  Each XHCI maps to one USB 2.0 PHY.
  XHCI controller#0 -- usb2phy -- phy#0
  XHCI controller#1 -- usb2phy -- phy#0
  XHCI controller#2 -- usb2phy -- phy#0

properties:
  compatible:
    enum:
      - realtek,rtd1295-usb2phy
      - realtek,rtd1312c-usb2phy
      - realtek,rtd1315e-usb2phy
      - realtek,rtd1319-usb2phy
      - realtek,rtd1319d-usb2phy
      - realtek,rtd1395-usb2phy
      - realtek,rtd1395-usb2phy-2port
      - realtek,rtd1619-usb2phy

Annotation

Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.