Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/phy/rockchip-mipi-dphy-rx0.yaml- Extension
.yaml- Size
- 1744 bytes
- Lines
- 74
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/rk3399-cru.hdt-bindings/power/rk3399-power.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0+ OR MIT)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/rockchip-mipi-dphy-rx0.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip SoC MIPI RX0 D-PHY
maintainers:
- Helen Koike <helen.koike@collabora.com>
- Ezequiel Garcia <ezequiel@collabora.com>
description: |
The Rockchip SoC has a MIPI D-PHY bus with an RX0 entry which connects to
the ISP1 (Image Signal Processing unit v1.0) for CSI cameras.
properties:
compatible:
const: rockchip,rk3399-mipi-dphy-rx0
clocks:
items:
- description: MIPI D-PHY ref clock
- description: MIPI D-PHY RX0 cfg clock
- description: Video in/out general register file clock
clock-names:
items:
- const: dphy-ref
- const: dphy-cfg
- const: grf
'#phy-cells':
const: 0
power-domains:
description: Video in/out power domain.
maxItems: 1
required:
- compatible
- clocks
- clock-names
- '#phy-cells'
- power-domains
additionalProperties: false
examples:
- |
/*
* MIPI D-PHY RX0 use registers in "general register files", it
* should be a child of the GRF.
*
* grf: syscon@ff770000 {
* compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd";
* ...
* };
*/
#include <dt-bindings/clock/rk3399-cru.h>
#include <dt-bindings/power/rk3399-power.h>
mipi_dphy_rx0: mipi-dphy-rx0 {
compatible = "rockchip,rk3399-mipi-dphy-rx0";
clocks = <&cru SCLK_MIPIDPHY_REF>,
<&cru SCLK_DPHY_RX0_CFG>,
<&cru PCLK_VIO_GRF>;
clock-names = "dphy-ref", "dphy-cfg", "grf";
Annotation
- Immediate include surface: `dt-bindings/clock/rk3399-cru.h`, `dt-bindings/power/rk3399-power.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.