Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml- Extension
.yaml- Size
- 1390 bytes
- Lines
- 74
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/rockchip,px30-dsi-dphy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip MIPI DPHY with additional LVDS/TTL modes
maintainers:
- Heiko Stuebner <heiko@sntech.de>
properties:
"#phy-cells":
const: 0
compatible:
enum:
- rockchip,px30-dsi-dphy
- rockchip,rk3128-dsi-dphy
- rockchip,rk3368-dsi-dphy
- rockchip,rk3506-dsi-dphy
- rockchip,rk3568-dsi-dphy
- rockchip,rv1126-dsi-dphy
reg:
maxItems: 1
clocks:
items:
- description: PLL reference clock
- description: Module clock
clock-names:
items:
- const: ref
- const: pclk
power-domains:
maxItems: 1
description: phandle to the associated power domain
resets:
items:
- description: exclusive PHY reset line
reset-names:
items:
- const: apb
required:
- "#phy-cells"
- compatible
- reg
- clocks
- clock-names
- resets
- reset-names
additionalProperties: false
examples:
- |
dsi_dphy: phy@ff2e0000 {
compatible = "rockchip,px30-dsi-dphy";
reg = <0xff2e0000 0x10000>;
clocks = <&pmucru 13>, <&cru 12>;
clock-names = "ref", "pclk";
resets = <&cru 12>;
reset-names = "apb";
#phy-cells = <0>;
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.