Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/phy/samsung,usb3-drd-phy.yaml
Extension
.yaml
Size
7312 bytes
Lines
307
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/samsung,usb3-drd-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Samsung Exynos SoC USB 3.0 DRD PHY USB 2.0 PHY

maintainers:
  - Krzysztof Kozlowski <krzk@kernel.org>
  - Marek Szyprowski <m.szyprowski@samsung.com>
  - Sylwester Nawrocki <s.nawrocki@samsung.com>

description: |
  For samsung,exynos5250-usbdrd-phy and samsung,exynos5420-usbdrd-phy
  compatible PHYs, the second cell in the PHY specifier identifies the
  PHY id, which is interpreted as follows::
    0 - UTMI+ type phy,
    1 - PIPE3 type phy.

  For SoCs like Exynos5420 having multiple USB 3.0 DRD PHY controllers,
  'usbdrd_phy' nodes should have numbered alias in the aliases node, in the
  form of usbdrdphyN, N = 0, 1... (depending on number of controllers).

properties:
  compatible:
    enum:
      - google,gs101-usb31drd-phy
      - samsung,exynos2200-usb32drd-phy
      - samsung,exynos5250-usbdrd-phy
      - samsung,exynos5420-usbdrd-phy
      - samsung,exynos5433-usbdrd-phy
      - samsung,exynos7-usbdrd-phy
      - samsung,exynos7870-usbdrd-phy
      - samsung,exynos850-usbdrd-phy
      - samsung,exynos990-usbdrd-phy
      - samsung,exynosautov920-usb31drd-combo-ssphy
      - samsung,exynosautov920-usbdrd-combo-hsphy
      - samsung,exynosautov920-usbdrd-phy

  clocks:
    minItems: 1
    maxItems: 5

  clock-names:
    minItems: 1
    maxItems: 5
    description: |
      Typically two clocks:
        - Main PHY clock (same as USB DRD controller i.e. DWC3 IP clock), used
          for register access.
        - PHY reference clock (usually crystal clock), used for PHY operations,
          associated by phy name. It is used to determine bit values for clock
          settings register.  For Exynos5420 this is given as 'sclk_usbphy30'
          in the CMU. It's not needed for Exynos2200.

  power-domains:
    maxItems: 1

  "#phy-cells":
    const: 1

  phys:
    maxItems: 1
    description:
      USBDRD-underlying high-speed PHY

  phy-names:
    const: hs

Annotation

Implementation Notes