Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/phy/starfive,jh7110-dphy-rx.yaml- Extension
.yaml- Size
- 1443 bytes
- Lines
- 72
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/starfive,jh7110-dphy-rx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: StarFive SoC JH7110 MIPI D-PHY Rx Controller
maintainers:
- Jack Zhu <jack.zhu@starfivetech.com>
- Changhuang Liang <changhuang.liang@starfivetech.com>
description:
StarFive SoCs contain a MIPI CSI D-PHY based on M31 IP, used to
transfer CSI camera data.
properties:
compatible:
const: starfive,jh7110-dphy-rx
reg:
maxItems: 1
clocks:
items:
- description: config clock
- description: reference clock
- description: escape mode transmit clock
clock-names:
items:
- const: cfg
- const: ref
- const: tx
resets:
items:
- description: DPHY_HW reset
- description: DPHY_B09_ALWAYS_ON reset
power-domains:
maxItems: 1
"#phy-cells":
const: 0
required:
- compatible
- reg
- clocks
- clock-names
- resets
- power-domains
- "#phy-cells"
additionalProperties: false
examples:
- |
phy@19820000 {
compatible = "starfive,jh7110-dphy-rx";
reg = <0x19820000 0x10000>;
clocks = <&ispcrg 3>,
<&ispcrg 4>,
<&ispcrg 5>;
clock-names = "cfg", "ref", "tx";
resets = <&ispcrg 2>,
<&ispcrg 3>;
power-domains = <&aon_syscon 1>;
#phy-cells = <0>;
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.