Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/phy/ti,phy-am654-serdes.yaml- Extension
.yaml- Size
- 2573 bytes
- Lines
- 99
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/phy/phy-am654-serdes.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/ti,phy-am654-serdes.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI AM654 SERDES
description:
This binding describes the TI AM654 SERDES. AM654 SERDES can be configured
to be used with either PCIe or USB or SGMII.
maintainers:
- Kishon Vijay Abraham I <kishon@ti.com>
properties:
compatible:
enum:
- ti,phy-am654-serdes
reg:
maxItems: 1
reg-names:
items:
- const: serdes
power-domains:
maxItems: 1
clocks:
maxItems: 3
description:
Three input clocks referring to left input reference clock, refclk and right input reference
clock.
'#phy-cells':
const: 2
description:
The 1st cell corresponds to the phy type (should be one of the types specified in
include/dt-bindings/phy/phy.h) and the 2nd cell should be the serdes lane function.
ti,serdes-clk:
description: Phandle to the SYSCON entry required for configuring SERDES clock selection.
$ref: /schemas/types.yaml#/definitions/phandle
'#clock-cells':
const: 1
mux-controls:
maxItems: 1
description: Phandle to the SYSCON entry required for configuring SERDES lane function.
clock-output-names:
oneOf:
- description: Clock output names for SERDES 0
items:
- const: serdes0_cmu_refclk
- const: serdes0_lo_refclk
- const: serdes0_ro_refclk
- description: Clock output names for SERDES 1
items:
- const: serdes1_cmu_refclk
- const: serdes1_lo_refclk
- const: serdes1_ro_refclk
required:
- compatible
- reg
- power-domains
Annotation
- Immediate include surface: `dt-bindings/phy/phy-am654-serdes.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.