Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/phy/ti,phy-usb3.yaml
Extension
.yaml
Size
3323 bytes
Lines
139
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/ti,phy-usb3.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: TI PIPE3 PHY Module

maintainers:
  - Roger Quadros <rogerq@ti.com>

description:
  The TI PIPE3 PHY is a high-speed SerDes (Serializer/Deserializer)
  transceiver integrated in OMAP5, DRA7xx/AM57xx, and similar SoCs.
  It supports multiple protocols (USB3, SATA, PCIe) using the PIPE3
  interface standard, which defines a common physical layer for
  high-speed serial interfaces.

properties:
  $nodename:
    pattern: "^(pcie-phy|usb3-phy|phy)@[0-9a-f]+$"

  compatible:
    enum:
      - ti,omap-usb3
      - ti,phy-pipe3-pcie
      - ti,phy-pipe3-sata
      - ti,phy-usb3

  reg:
    minItems: 2
    maxItems: 3

  reg-names:
    minItems: 2
    items:
      - const: phy_rx
      - const: phy_tx
      - const: pll_ctrl

  "#phy-cells":
    const: 0

  clocks:
    minItems: 2
    maxItems: 7

  clock-names:
    minItems: 2
    maxItems: 7
    items:
      enum: [wkupclk, sysclk, refclk, dpll_ref,
             dpll_ref_m2, phy-div, div-clk]

  syscon-phy-power:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    maxItems: 1
    items:
      items:
        - description: Phandle to the system control module
        - description: Register offset controlling PHY power

  syscon-pllreset:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    maxItems: 1
    items:
      items:
        - description: Phandle to the system control module
        - description: Register offset of CTRL_CORE_SMA_SW_0

Annotation

Implementation Notes