Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/aspeed,ast2600-pinctrl.yaml- Extension
.yaml- Size
- 9320 bytes
- Lines
- 538
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0+
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2600-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ASPEED AST2600 Pin Controller
maintainers:
- Andrew Jeffery <andrew@aj.id.au>
description: |+
The pin controller node should be the child of a syscon node with the
required property:
- compatible: Should be one of the following:
"aspeed,ast2600-scu", "syscon", "simple-mfd"
Refer to the bindings described in
Documentation/devicetree/bindings/mfd/syscon.yaml
Note: According to the NCSI specification, the reference clock output pin
(RMIIXRCLKO) is not required on the management controller side. To optimize
pin usage, add "NCSI" pin groups that are equivalent to the RMII pin groups,
but without the RMIIXRCLKO pin.
properties:
compatible:
const: aspeed,ast2600-pinctrl
additionalProperties:
$ref: pinmux-node.yaml#
additionalProperties: false
properties:
function:
enum:
- ADC0
- ADC1
- ADC10
- ADC11
- ADC12
- ADC13
- ADC14
- ADC15
- ADC2
- ADC3
- ADC4
- ADC5
- ADC6
- ADC7
- ADC8
- ADC9
- BMCINT
- EMMC
- ESPI
- ESPIALT
- FSI1
- FSI2
- FWQSPI
- FWSPIABR
- FWSPID
- FWSPIWP
- GPIT0
- GPIT1
- GPIT2
- GPIT3
- GPIT4
- GPIT5
- GPIT6
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.