Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/atmel,at91rm9200-pinctrl.yaml- Extension
.yaml- Size
- 4807 bytes
- Lines
- 185
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/at91.hdt-bindings/interrupt-controller/irq.hdt-bindings/pinctrl/at91.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/atmel,at91rm9200-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip PIO3 Pinmux Controller
maintainers:
- Manikandan Muralidharan <manikandan.m@microchip.com>
description:
The AT91 Pinmux Controller, enables the IC to share one PAD to several
functional blocks. The sharing is done by multiplexing the PAD input/output
signals. For each PAD there are up to 8 muxing options (called periph modes).
Since different modules require different PAD settings (like pull up, keeper,
etc) the controller controls also the PAD settings parameters.
properties:
compatible:
oneOf:
- items:
- enum:
- atmel,at91rm9200-pinctrl
- atmel,at91sam9x5-pinctrl
- atmel,sama5d3-pinctrl
- microchip,sam9x60-pinctrl
- const: simple-mfd
- items:
- enum:
- microchip,sam9x7-pinctrl
- const: microchip,sam9x60-pinctrl
- const: simple-mfd
'#address-cells':
const: 1
'#size-cells':
const: 1
ranges: true
atmel,mux-mask:
$ref: /schemas/types.yaml#/definitions/uint32-matrix
description: |
Array of mask (periph per bank) to describe if a pin can be
configured in this periph mode. All the periph and bank need to
be described.
#How to create such array:
Each column will represent the possible peripheral of the pinctrl
Each line will represent a pio bank
#Example:
In at91sam9260.dtsi,
Peripheral: 2 ( A and B)
Bank: 3 (A, B and C)
# A B
0xffffffff 0xffc00c3b # pioA
0xffffffff 0x7fff3ccf # pioB
0xffffffff 0x007fffff # pioC
For each peripheral/bank we will describe in a u32 if a pin can be
configured in it by putting 1 to the pin bit (1 << pin)
Let's take the pioA on peripheral B whose value is 0xffc00c3b
From the datasheet Table 10-2.
Annotation
- Immediate include surface: `dt-bindings/clock/at91.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/pinctrl/at91.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.