Documentation/devicetree/bindings/pinctrl/cix,sky1-pinctrl.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/cix,sky1-pinctrl.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pinctrl/cix,sky1-pinctrl.yaml
Extension
.yaml
Size
2215 bytes
Lines
92
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/cix,sky1-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Cix Sky1 Soc Pin Controller

maintainers:
  - Gary Yang <gary.yang@cixtech.com>

description:
  The pin-controller is used to control Soc pins. There are two pin-controllers
  on Cix Sky1 platform. one is used under S0 state, the other one is used under
  S0 and S5 state.

properties:
  compatible:
    enum:
      - cix,sky1-pinctrl
      - cix,sky1-pinctrl-s5

  reg:
    items:
      - description: gpio base

patternProperties:
  '-cfg$':
    type: object
    additionalProperties: false

    description:
      A pinctrl node should contain at least one subnode representing the
      pinctrl groups available on the machine.

    patternProperties:
      'pins$':
        type: object
        additionalProperties: false

        description:
          Each subnode will list the pins it needs, and how they should
          be configured, with regard to muxer configuration, bias pull,
          and drive strength.

        allOf:
          - $ref: pincfg-node.yaml#
          - $ref: pinmux-node.yaml#

        properties:
          pinmux:
            description:
              Values are constructed from pin number and mux setting, pin
              number is left shifted by 8 bits, then ORed with mux setting

          bias-disable: true

          bias-pull-up: true

          bias-pull-down: true

          drive-strength:
            description:
              typical current when output high level.
            enum: [ 2, 3, 5, 6, 8, 9, 11, 12, 13, 14, 17, 18, 20, 21, 23,
                    24 ]

        required:
          - pinmux

Annotation

Implementation Notes