Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/intel,pinctrl-keembay.yaml- Extension
.yaml- Size
- 3614 bytes
- Lines
- 137
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.hdt-bindings/interrupt-controller/irq.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-keembay.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Intel Keem Bay pin controller
maintainers:
- Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
description: |
Intel Keem Bay SoC integrates a pin controller which enables control
of pin directions, input/output values and configuration
for a total of 80 pins.
properties:
compatible:
const: intel,keembay-pinctrl
reg:
maxItems: 2
gpio-controller: true
'#gpio-cells':
const: 2
ngpios:
description: The number of GPIOs exposed.
const: 80
interrupts:
description:
Specifies the interrupt lines to be used by the controller.
Each interrupt line is shared by up to 4 GPIO lines.
maxItems: 8
interrupt-controller: true
'#interrupt-cells':
const: 2
patternProperties:
'^gpio@[0-9a-f]*$':
type: object
additionalProperties: false
description:
Child nodes can be specified to contain pin configuration information,
which can then be utilized by pinctrl client devices.
The following properties are supported.
properties:
pins:
description: |
The name(s) of the pins to be configured in the child node.
Supported pin names are "GPIO0" up to "GPIO79".
bias-disable: true
bias-pull-down: true
bias-pull-up: true
drive-strength:
description: IO pads drive strength in milli Ampere.
enum: [2, 4, 8, 12]
bias-bus-hold:
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/interrupt-controller/irq.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.