Documentation/devicetree/bindings/pinctrl/marvell,armada3710-xb-pinctrl.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/marvell,armada3710-xb-pinctrl.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/marvell,armada3710-xb-pinctrl.yaml- Extension
.yaml- Size
- 3346 bytes
- Lines
- 126
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/marvell,armada3710-xb-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Marvell Armada 37xx SoC pin and gpio controller
maintainers:
- Gregory CLEMENT <gregory.clement@bootlin.com>
- Marek BehĂșn <kabel@kernel.org>
- Miquel Raynal <miquel.raynal@bootlin.com>
description: >
Each Armada 37xx SoC come with two pin and gpio controller one for the south
bridge and the other for the north bridge.
Inside this set of register the gpio latch allows exposing some configuration
of the SoC and especially the clock frequency of the xtal. Hence, this node is
a represent as syscon allowing sharing the register between multiple hardware
block.
properties:
compatible:
items:
- enum:
- marvell,armada3710-sb-pinctrl
- marvell,armada3710-nb-pinctrl
- const: syscon
- const: simple-mfd
reg:
items:
- description: pinctrl and GPIO controller registers
- description: interrupt controller registers
gpio:
description: GPIO controller subnode
type: object
additionalProperties: false
properties:
'#gpio-cells':
const: 2
gpio-controller: true
gpio-ranges:
description: Range of pins managed by the GPIO controller
'#interrupt-cells':
const: 2
interrupt-controller: true
interrupts:
description: List of interrupt specifiers for the GPIO controller
required:
- '#gpio-cells'
- gpio-ranges
- gpio-controller
- '#interrupt-cells'
- interrupt-controller
- interrupts
xtal-clk:
type: object
additionalProperties: false
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.