Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pinctrl/mediatek,mt8365-pinctrl.yaml
Extension
.yaml
Size
8208 bytes
Lines
231
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/mediatek,mt8365-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek MT8365 Pin Controller

maintainers:
  - Zhiyong Tao <zhiyong.tao@mediatek.com>
  - Bernhard Rosenkränzer <bero@baylibre.com>

description:
  The MediaTek's MT8365 Pin controller is used to control SoC pins.

properties:
  compatible:
    const: mediatek,mt8365-pinctrl

  reg:
    maxItems: 1

  mediatek,pctl-regmap:
    $ref: /schemas/types.yaml#/definitions/phandle-array
    items:
      maxItems: 1
    minItems: 1
    maxItems: 2
    description:
      Should be phandles of the syscfg node.

  gpio-controller: true

  "#gpio-cells":
    const: 2
    description:
      Number of cells in GPIO specifier. Since the generic GPIO binding is used,
      the amount of cells must be specified as 2. See the below mentioned gpio
      binding representation for description of particular cells.

  interrupt-controller: true

  interrupts:
    maxItems: 1

  "#interrupt-cells":
    const: 2

patternProperties:
  "-pins$":
    type: object
    additionalProperties: false
    patternProperties:
      "pins$":
        type: object
        additionalProperties: false
        description:
          A pinctrl node should contain at least one subnode representing the
          pinctrl groups available on the machine. Each subnode will list the
          pins it needs, and how they should be configured, with regard to muxer
          configuration, pullups, drive strength, input enable/disable and input
          schmitt.
        $ref: /schemas/pinctrl/pincfg-node.yaml

        properties:
          pinmux:
            description:
              Integer array, represents gpio pin number and mux setting.
              Supported pin number and mux varies for different SoCs, and are
              defined as macros in <soc>-pinfunc.h directly.

Annotation

Implementation Notes