Documentation/devicetree/bindings/pinctrl/microchip,mcp23s08.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/microchip,mcp23s08.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/microchip,mcp23s08.yaml- Extension
.yaml- Size
- 4514 bytes
- Lines
- 162
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/irq.hdt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/microchip,mcp23s08.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microchip I/O expander with serial interface (I2C/SPI)
maintainers:
- Himanshu Bhavani <himanshu.bhavani@siliconsignals.io>
description:
Microchip MCP23008, MCP23017, MCP23S08, MCP23S17, MCP23S18 GPIO expander
chips.These chips provide 8 or 16 GPIO pins with either I2C or SPI interface.
allOf:
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:
enum:
- microchip,mcp23s08
- microchip,mcp23s17
- microchip,mcp23s18
- microchip,mcp23008
- microchip,mcp23017
- microchip,mcp23018
reg:
maxItems: 1
gpio-controller: true
'#gpio-cells':
const: 2
interrupt-controller: true
'#interrupt-cells':
const: 2
interrupts:
maxItems: 1
reset-gpios:
description: GPIO specifier for active-low reset pin.
maxItems: 1
microchip,spi-present-mask:
description:
Multiple SPI chips can share the same SPI chipselect. Set a bit in
bit0-7 in this mask to 1 if there is a chip connected with the
corresponding spi address set. For example if you have a chip with
address 3 connected, you have to set bit3 to 1, which is 0x08. mcp23s08
chip variant only supports bits 0-3. It is not possible to mix mcp23s08
and mcp23s17 on the same chipselect. Set at least one bit to 1 for SPI
chips.
$ref: /schemas/types.yaml#/definitions/uint8
microchip,irq-mirror:
type: boolean
description:
Sets the mirror flag in the IOCON register. Devices with two interrupt
outputs (these are the devices ending with 17 and those that have 16 IOs)
have two IO banks IO 0-7 form bank 1 and IO 8-15 are bank 2. These chips
have two different interrupt outputs One for bank 1 and another for
bank 2. If irq-mirror is set, both interrupts are generated regardless of
the bank that an input change occurred on. If it is not set,the interrupt
are only generated for the bank they belong to.
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/gpio/gpio.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.