Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/mscc,ocelot-pinctrl.yaml- Extension
.yaml- Size
- 2800 bytes
- Lines
- 134
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/mscc,ocelot-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Microsemi Ocelot pin controller
maintainers:
- Alexandre Belloni <alexandre.belloni@bootlin.com>
- Lars Povlsen <lars.povlsen@microchip.com>
properties:
compatible:
oneOf:
- enum:
- microchip,lan96455f-pinctrl
- microchip,lan966x-pinctrl
- microchip,lan9691-pinctrl
- microchip,sparx5-pinctrl
- mscc,jaguar2-pinctrl
- mscc,luton-pinctrl
- mscc,ocelot-pinctrl
- mscc,serval-pinctrl
- mscc,servalt-pinctrl
- items:
- enum:
- microchip,lan9698-pinctrl
- microchip,lan9696-pinctrl
- microchip,lan9694-pinctrl
- microchip,lan9693-pinctrl
- microchip,lan9692-pinctrl
- const: microchip,lan9691-pinctrl
- items:
- enum:
- microchip,lan96457f-pinctrl
- microchip,lan96459f-pinctrl
- const: microchip,lan96455f-pinctrl
reg:
items:
- description: Base address
- description: Extended pin configuration registers
minItems: 1
gpio-controller: true
'#gpio-cells':
const: 2
gpio-ranges: true
interrupts:
maxItems: 1
interrupt-controller: true
"#interrupt-cells":
const: 2
resets:
maxItems: 1
reset-names:
description: Optional shared switch reset.
items:
- const: switch
patternProperties:
'-pins$':
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.