Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.yaml- Extension
.yaml- Size
- 8035 bytes
- Lines
- 175
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/tegra124-car.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/pinctrl/pinctrl-tegra.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra124-pinmux.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra124 Pinmux Controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
description: The Tegra124 pinctrl binding is very similar to the Tegra20 and
Tegra30 pinctrl binding, as described in nvidia,tegra20-pinmux.yaml and
nvidia,tegra30-pinmux.yaml. In fact, this document assumes that binding as a
baseline, and only documents the differences between the two bindings.
properties:
compatible:
oneOf:
- const: nvidia,tegra124-pinmux
- items:
- const: nvidia,tegra132-pinmux
- const: nvidia,tegra124-pinmux
reg:
items:
- description: driver strength and pad control registers
- description: pinmux registers
- description: MIPI_PAD_CTRL registers
patternProperties:
"^pinmux(-[a-z0-9-_]+)?$":
type: object
# pin groups
additionalProperties:
$ref: nvidia,tegra-pinmux-common.yaml
additionalProperties: false
properties:
nvidia,pins:
$ref: /schemas/types.yaml#/definitions/string-array
items:
enum: [ ulpi_data0_po1, ulpi_data1_po2, ulpi_data2_po3,
ulpi_data3_po4, ulpi_data4_po5, ulpi_data5_po6,
ulpi_data6_po7, ulpi_data7_po0, ulpi_clk_py0, ulpi_dir_py1,
ulpi_nxt_py2, ulpi_stp_py3, dap3_fs_pp0, dap3_din_pp1,
dap3_dout_pp2, dap3_sclk_pp3, pv0, pv1, sdmmc1_clk_pz0,
sdmmc1_cmd_pz1, sdmmc1_dat3_py4, sdmmc1_dat2_py5,
sdmmc1_dat1_py6, sdmmc1_dat0_py7, clk2_out_pw5,
clk2_req_pcc5, hdmi_int_pn7, ddc_scl_pv4, ddc_sda_pv5,
uart2_rxd_pc3, uart2_txd_pc2, uart2_rts_n_pj6,
uart2_cts_n_pj5, uart3_txd_pw6, uart3_rxd_pw7,
uart3_cts_n_pa1, uart3_rts_n_pc0, pu0, pu1, pu2, pu3, pu4,
pu5, pu6, gen1_i2c_scl_pc4, gen1_i2c_sda_pc5, dap4_fs_pp4,
dap4_din_pp5, dap4_dout_pp6, dap4_sclk_pp7, clk3_out_pee0,
clk3_req_pee1, pc7, pi5, pi7, pk0, pk1, pj0, pj2, pk3, pk4,
pk2, pi3, pi6, pg0, pg1, pg2, pg3, pg4, pg5, pg6, pg7, ph0,
ph1, ph2, ph3, ph4, ph5, ph6, ph7, pj7, pb0, pb1, pk7, pi0,
pi1, pi2, pi4, gen2_i2c_scl_pt5, gen2_i2c_sda_pt6,
sdmmc4_clk_pcc4, sdmmc4_cmd_pt7, sdmmc4_dat0_paa0,
sdmmc4_dat1_paa1, sdmmc4_dat2_paa2, sdmmc4_dat3_paa3,
sdmmc4_dat4_paa4, sdmmc4_dat5_paa5, sdmmc4_dat6_paa6,
sdmmc4_dat7_paa7, cam_mclk_pcc0, pcc1, pbb0,
cam_i2c_scl_pbb1, cam_i2c_sda_pbb2, pbb3, pbb4, pbb5, pbb6,
pbb7, pcc2, jtag_rtck, pwr_i2c_scl_pz6, pwr_i2c_sda_pz7,
kb_row0_pr0, kb_row1_pr1, kb_row2_pr2, kb_row3_pr3,
kb_row4_pr4, kb_row5_pr5, kb_row6_pr6, kb_row7_pr7,
kb_row8_ps0, kb_row9_ps1, kb_row10_ps2, kb_row11_ps3,
kb_row12_ps4, kb_row13_ps5, kb_row14_ps6, kb_row15_ps7,
Annotation
- Immediate include surface: `dt-bindings/clock/tegra124-car.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/pinctrl/pinctrl-tegra.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.