Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pinctrl/nvidia,tegra234-pinmux.yaml
Extension
.yaml
Size
7045 bytes
Lines
147
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra234-pinmux.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NVIDIA Tegra234 Pinmux Controller

maintainers:
  - Thierry Reding <thierry.reding@gmail.com>
  - Jon Hunter <jonathanh@nvidia.com>

properties:
  compatible:
    const: nvidia,tegra234-pinmux

  reg:
    maxItems: 1

patternProperties:
  "^pinmux(-[a-z0-9-]+)?$":
    type: object

    # pin groups
    additionalProperties:
      $ref: nvidia,tegra234-pinmux-common.yaml

      properties:
        nvidia,pins:
          items:
            enum: [ dap6_sclk_pa0, dap6_dout_pa1, dap6_din_pa2,
                    dap6_fs_pa3, dap4_sclk_pa4, dap4_dout_pa5,
                    dap4_din_pa6, dap4_fs_pa7, soc_gpio08_pb0,
                    qspi0_sck_pc0, qspi0_cs_n_pc1,
                    qspi0_io0_pc2, qspi0_io1_pc3, qspi0_io2_pc4,
                    qspi0_io3_pc5, qspi1_sck_pc6, qspi1_cs_n_pc7,
                    qspi1_io0_pd0, qspi1_io1_pd1, qspi1_io2_pd2,
                    qspi1_io3_pd3, eqos_txc_pe0, eqos_td0_pe1,
                    eqos_td1_pe2, eqos_td2_pe3, eqos_td3_pe4,
                    eqos_tx_ctl_pe5, eqos_rd0_pe6, eqos_rd1_pe7,
                    eqos_rd2_pf0, eqos_rd3_pf1, eqos_rx_ctl_pf2,
                    eqos_rxc_pf3, eqos_sma_mdio_pf4, eqos_sma_mdc_pf5,
                    soc_gpio13_pg0, soc_gpio14_pg1, soc_gpio15_pg2,
                    soc_gpio16_pg3, soc_gpio17_pg4, soc_gpio18_pg5,
                    soc_gpio19_pg6, soc_gpio20_pg7, soc_gpio21_ph0,
                    soc_gpio22_ph1, soc_gpio06_ph2, uart4_tx_ph3,
                    uart4_rx_ph4, uart4_rts_ph5, uart4_cts_ph6,
                    soc_gpio41_ph7, soc_gpio42_pi0, soc_gpio43_pi1,
                    soc_gpio44_pi2, gen1_i2c_scl_pi3, gen1_i2c_sda_pi4,
                    cpu_pwr_req_pi5, soc_gpio07_pi6,
                    sdmmc1_clk_pj0, sdmmc1_cmd_pj1, sdmmc1_dat0_pj2,
                    sdmmc1_dat1_pj3, sdmmc1_dat2_pj4, sdmmc1_dat3_pj5,
                    pex_l0_clkreq_n_pk0, pex_l0_rst_n_pk1,
                    pex_l1_clkreq_n_pk2, pex_l1_rst_n_pk3,
                    pex_l2_clkreq_n_pk4, pex_l2_rst_n_pk5,
                    pex_l3_clkreq_n_pk6, pex_l3_rst_n_pk7,
                    pex_l4_clkreq_n_pl0, pex_l4_rst_n_pl1,
                    pex_wake_n_pl2, soc_gpio34_pl3, dp_aux_ch0_hpd_pm0,
                    dp_aux_ch1_hpd_pm1, dp_aux_ch2_hpd_pm2,
                    dp_aux_ch3_hpd_pm3, soc_gpio55_pm4, soc_gpio36_pm5,
                    soc_gpio53_pm6, soc_gpio38_pm7, dp_aux_ch3_n_pn0,
                    soc_gpio39_pn1, soc_gpio40_pn2, dp_aux_ch1_p_pn3,
                    dp_aux_ch1_n_pn4, dp_aux_ch2_p_pn5, dp_aux_ch2_n_pn6,
                    dp_aux_ch3_p_pn7, extperiph1_clk_pp0,
                    extperiph2_clk_pp1, cam_i2c_scl_pp2, cam_i2c_sda_pp3,
                    soc_gpio23_pp4, soc_gpio24_pp5, soc_gpio25_pp6,
                    pwr_i2c_scl_pp7, pwr_i2c_sda_pq0, soc_gpio28_pq1,
                    soc_gpio29_pq2, soc_gpio30_pq3, soc_gpio31_pq4,
                    soc_gpio32_pq5, soc_gpio33_pq6, soc_gpio35_pq7,
                    soc_gpio37_pr0, soc_gpio56_pr1, uart1_tx_pr2,

Annotation

Implementation Notes