Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/nvidia,tegra264-pinmux-main.yaml- Extension
.yaml- Size
- 8691 bytes
- Lines
- 168
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/pinctrl/pinctrl-tegra.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/nvidia,tegra264-pinmux-main.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra264 Main Pinmux Controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
properties:
compatible:
const: nvidia,tegra264-pinmux-main
reg:
maxItems: 1
patternProperties:
"^pinmux(-[a-z0-9-]+)?$":
type: object
# pin groups
additionalProperties:
$ref: nvidia,tegra264-pinmux-common.yaml
properties:
nvidia,pins:
items:
enum: [ pwm1_pa0, pwm6_pa1, pwm7_pa2, pwm8_pa3, ufs0_ref_clk_pa4,
ufs0_rst_n_pa5, soc_gpio250_pf0, soc_gpio251_pf1,
soc_gpio252_pf2, dp_aux_ch0_hpd_pf3, dp_aux_ch1_hpd_pf4,
dp_aux_ch2_hpd_pf5, dp_aux_ch3_hpd_pf6, pwm2_pf7, pwm3_pg0,
gen7_i2c_scl_pg1, gen7_i2c_sda_pg2, gen9_i2c_scl_pg3,
gen9_i2c_sda_pg4, sdmmc1_clk_px0, sdmmc1_cmd_px1,
sdmmc1_dat0_px2, sdmmc1_dat1_px3, sdmmc1_dat2_px4,
sdmmc1_dat3_px5, sdmmc1_comp, soc_gpio124_pl0,
soc_gpio125_pl1, fan_tach0_pl2, soc_gpio127_pl3,
soc_gpio128_pl4, soc_gpio129_pl5, soc_gpio130_pl6,
soc_gpio131_pl7, gp_pwm9_pm0, soc_gpio133_pm1, uart9_tx_pm2,
uart9_rx_pm3, uart9_rts_n_pm4, uart9_cts_n_pm5,
soc_gpio170_pu0, soc_gpio171_pu1, soc_gpio172_pu2,
soc_gpio173_pu3, soc_gpio174_pu4, soc_gpio175_pu5,
soc_gpio176_pu6, soc_gpio177_pu7, soc_gpio178_pv0,
pwm10_pv1, uart4_tx_pv2, uart4_rx_pv3, uart4_rts_n_pv4,
uart4_cts_n_pv5, dap2_clk_pv6, dap2_din_pv7, dap2_dout_pw0,
dap2_fs_pw1, gen1_i2c_scl_pw2, gen1_i2c_sda_pw3,
gen0_i2c_scl_pw4, gen0_i2c_sda_pw5, pwr_i2c_scl_pw6,
pwr_i2c_sda_pw7, soc_gpio138_pp0, soc_gpio139_pp1,
dap6_sclk_pp2, dap6_dout_pp3, dap6_din_pp4, dap6_fs_pp5,
dap4_sclk_pp6, dap4_dout_pp7, dap4_din_pq0, dap4_fs_pq1,
spi5_sck_pq2, spi5_miso_pq3, spi5_mosi_pq4, spi5_cs0_pq5,
soc_gpio152_pq6, soc_gpio153_pq7, aud_mclk_pr0,
soc_gpio155_pr1, dap1_sclk_pr2, dap1_out_pr3, dap1_in_pr4,
dap1_fs_pr5, gen11_i2c_scl_pr6, gen11_i2c_sda_pr7,
soc_gpio350_ps0, soc_gpio351_ps1, qspi0_sck_pt0,
qspi0_cs_n_pt1, qspi0_io0_pt2, qspi0_io1_pt3, qspi0_io2_pt4,
qspi0_io3_pt5, soc_gpio192_pt6, soc_gpio270_py0,
soc_gpio271_py1, soc_gpio272_py2, soc_gpio273_py3,
soc_gpio274_py4, soc_gpio275_py5, soc_gpio276_py6,
soc_gpio277_py7, soc_gpio278_pz0, soc_gpio279_pz1,
xhalt_trig_pz2, soc_gpio281_pz3, soc_gpio282_pz4,
soc_gpio283_pz5, soc_gpio284_pz6, soc_gpio285_pz7,
soc_gpio286_pal0, soc_gpio287_pal1, soc_gpio288_pal2,
cpu_pwr_req_ph0, gpu_pwr_req_ph1, uart10_tx_ph2,
uart10_rx_ph3, uart10_rts_n_ph4, uart10_cts_n_ph5,
spi3_sck_ph6, spi3_miso_ph7, spi3_mosi_pj0, spi3_cs0_pj1,
spi3_cs3_pj2, uart5_tx_pj3, uart5_rx_pj4, uart5_rts_n_pj5,
uart5_cts_n_pj6, spi1_sck_pj7, spi1_miso_pk0, spi1_mosi_pk1,
Annotation
- Immediate include surface: `dt-bindings/pinctrl/pinctrl-tegra.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.