Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pinctrl/nxp,s32g2-siul2-pinctrl.yaml
Extension
.yaml
Size
3877 bytes
Lines
124
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright 2022 NXP
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/nxp,s32g2-siul2-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: NXP S32G2 pin controller

maintainers:
  - Ghennadi Procopciuc <Ghennadi.Procopciuc@oss.nxp.com>
  - Chester Lin <chester62515@gmail.com>

description: |
  S32G2 pinmux is implemented in SIUL2 (System Integration Unit Lite2),
  whose memory map is split into two regions:
    SIUL2_0 @ 0x4009c000
    SIUL2_1 @ 0x44010000

  Every SIUL2 region has multiple register types, and here only MSCR and
  IMCR registers need to be revealed for kernel to configure pinmux.

  Please note that some register indexes are reserved in S32G2, such as
  MSCR102-MSCR111, MSCR123-MSCR143, IMCR84-IMCR118 and IMCR398-IMCR429.

properties:
  compatible:
    enum:
      - nxp,s32g2-siul2-pinctrl

  reg:
    description: |
      A list of MSCR/IMCR register regions to be reserved.
      - MSCR (Multiplexed Signal Configuration Register)
        An MSCR register can configure the associated pin as either a GPIO pin
        or a function output pin depends on the selected signal source.
      - IMCR (Input Multiplexed Signal Configuration Register)
        An IMCR register can configure the associated pin as function input
        pin depends on the selected signal source.
    items:
      - description: MSCR registers group 0 in SIUL2_0
      - description: MSCR registers group 1 in SIUL2_1
      - description: MSCR registers group 2 in SIUL2_1
      - description: IMCR registers group 0 in SIUL2_0
      - description: IMCR registers group 1 in SIUL2_1
      - description: IMCR registers group 2 in SIUL2_1

patternProperties:
  '-pins$':
    type: object
    additionalProperties: false

    patternProperties:
      '-grp[0-9]$':
        type: object
        allOf:
          - $ref: pinmux-node.yaml#
          - $ref: pincfg-node.yaml#
        description: |
          Pinctrl node's client devices specify pin muxes using subnodes,
          which in turn use the standard properties below.

        properties:
          bias-disable: true
          bias-high-impedance: true
          bias-pull-up: true
          bias-pull-down: true
          drive-open-drain: true
          input-enable: true
          output-enable: true

Annotation

Implementation Notes