Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/pinctrl-st.txt- Extension
.txt- Size
- 5323 bytes
- Lines
- 175
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: documentation
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
Each multi-function pin is controlled, driven and routed through the
PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
and multiple alternate functions(ALT1 - ALTx) that directly connect
the pin to different hardware blocks.
When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and
Pull Up (PU) are driven by the related PIO block.
ST pinctrl driver controls PIO multiplexing block and also interacts with
gpio driver to configure a pin.
GPIO bank can have one of the two possible types of interrupt-wirings.
First type is via irqmux, single interrupt is used by multiple gpio banks. This
reduces number of overall interrupts numbers required. All these banks belong to
a single pincontroller.
_________
| |----> [gpio-bank (n) ]
| |----> [gpio-bank (n + 1)]
[irqN]-- | irq-mux |----> [gpio-bank (n + 2)]
| |----> [gpio-bank (... )]
|_________|----> [gpio-bank (n + 7)]
Second type has a dedicated interrupt per gpio bank.
[irqN]----> [gpio-bank (n)]
Pin controller node:
Required properties:
- compatible : should be "st,stih407-<pio-block>-pinctrl"
- st,syscfg : Should be a phandle of the syscfg node.
- st,retime-pin-mask : Should be mask to specify which pins can be retimed.
If the property is not present, it is assumed that all the pins in the
bank are capable of retiming. Retiming is mainly used to improve the
IO timing margins of external synchronous interfaces.
- ranges : defines mapping between pin controller node (parent) to gpio-bank
node (children).
Optional properties:
- interrupts : Interrupt number of the irqmux. If the interrupt is shared
with other gpio banks via irqmux.
a irqline and gpio banks.
- reg : irqmux memory resource. If irqmux is present.
- reg-names : irqmux resource should be named as "irqmux".
GPIO controller/bank node.
Required properties:
- gpio-controller : Indicates this device is a GPIO controller
- #gpio-cells : Must be two.
- First cell: specifies the pin number inside the controller
- Second cell: specifies whether the pin is logically inverted.
- 0 = active high
- 1 = active low
- st,bank-name : Should be a name string for this bank as specified in
datasheet.
Optional properties:
- interrupts : Interrupt number for this gpio bank. If there is a dedicated
interrupt wired up for this gpio bank.
- interrupt-controller : Indicates this device is a interrupt controller. GPIO
bank can be an interrupt controller iff one of the interrupt type either via
irqmux or a dedicated interrupt per bank is specified.
- #interrupt-cells: the value of this property should be 2.
- First Cell: represents the external gpio interrupt number local to the
gpio interrupt space of the controller.
- Second Cell: flags to identify the type of the interrupt
- 1 = rising edge triggered
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.