Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/qcom,ipq6018-pinctrl.yaml- Extension
.yaml- Size
- 4377 bytes
- Lines
- 119
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,ipq6018-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. IPQ6018 TLMM block
maintainers:
- Bjorn Andersson <andersson@kernel.org>
description:
Top Level Mode Multiplexer pin controller in Qualcomm IPQ6018 SoC.
properties:
compatible:
const: qcom,ipq6018-pinctrl
reg:
maxItems: 1
interrupts:
maxItems: 1
patternProperties:
"-state$":
oneOf:
- $ref: "#/$defs/qcom-ipq6018-tlmm-state"
- patternProperties:
"-pins$":
$ref: "#/$defs/qcom-ipq6018-tlmm-state"
additionalProperties: false
$defs:
qcom-ipq6018-tlmm-state:
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
description:
List of gpio pins affected by the properties specified in this
subnode.
items:
oneOf:
- pattern: "^gpio([1-9]|[1-7][0-9]|80)$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd,
sdc2_data, qdsd_cmd, qdsd_data0, qdsd_data1, qdsd_data2,
qdsd_data3 ]
minItems: 1
maxItems: 16
function:
description:
Specify the alternative function to be configured for the specified
pins.
enum: [ adsp_ext, alsp_int, atest_bbrx0, atest_bbrx1, atest_char,
atest_char0, atest_char1, atest_char2, atest_char3, atest_combodac,
atest_gpsadc0, atest_gpsadc1, atest_tsens, atest_wlan0,
atest_wlan1, backlight_en, bimc_dte0, bimc_dte1, blsp0_i2c, blsp1_i2c,
blsp2_i2c, blsp3_i2c, blsp4_i2c, blsp5_i2c, blsp0_spi, blsp1_spi,
blsp1_spi_cs1, blsp1_spi_cs2, blsp1_spi_cs3, blsp2_spi,
blsp2_spi_cs1, blsp2_spi_cs2, blsp2_spi_cs3, blsp3_spi,
blsp3_spi_cs1, blsp3_spi_cs2, blsp3_spi_cs3, blsp4_spi, blsp5_spi,
blsp0_uart, blsp1_uart, blsp2_uart, blsp1_uim, blsp2_uim, cam1_rst,
cam1_standby, cam_mclk0, cam_mclk1, cci_async, cci_i2c, cci_timer0,
cci_timer1, cci_timer2, cdc_pdm0, codec_mad, dbg_out, display_5v,
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.