Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/qcom,sdx55-pinctrl.yaml- Extension
.yaml- Size
- 4277 bytes
- Lines
- 123
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/qcom,sdx55-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Technologies, Inc. SDX55 TLMM block
maintainers:
- Vinod Koul <vkoul@kernel.org>
description:
Top Level Mode Multiplexer pin controller in Qualcomm SDX55 SoC.
properties:
compatible:
const: qcom,sdx55-pinctrl
reg:
description: Specifies the base address and size of the TLMM register space
maxItems: 1
interrupts:
maxItems: 1
gpio-reserved-ranges:
maxItems: 1
patternProperties:
"-state$":
oneOf:
- $ref: "#/$defs/qcom-sdx55-tlmm-state"
- patternProperties:
"-pins$":
$ref: "#/$defs/qcom-sdx55-tlmm-state"
additionalProperties: false
$defs:
qcom-sdx55-tlmm-state:
type: object
description:
Pinctrl node's client devices use subnodes for desired pin configuration.
Client device subnodes use below standard properties.
$ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state
unevaluatedProperties: false
properties:
pins:
description:
List of gpio pins affected by the properties specified in this subnode.
items:
oneOf:
- pattern: "^gpio([0-9]|[1-9][0-9]|10[0-7])$"
- enum: [ sdc1_clk, sdc1_cmd, sdc1_data, sdc2_clk, sdc2_cmd, sdc2_data ]
minItems: 1
maxItems: 36
function:
description:
Specify the alternative function to be configured for the specified
pins. Functions are only valid for gpio pins.
enum: [ adsp_ext, atest, audio_ref, bimc_dte0, bimc_dte1, blsp_i2c1,
blsp_i2c2, blsp_i2c3, blsp_i2c4, blsp_spi1, blsp_spi2,
blsp_spi3, blsp_spi4, blsp_uart1, blsp_uart2, blsp_uart3,
blsp_uart4, char_exec, coex_uart, coex_uart2, cri_trng,
cri_trng0, cri_trng1, dbg_out, ddr_bist, ddr_pxi0,
ebi0_wrcdc, ebi2_a, ebi2_lcd, emac_gcc0, emac_gcc1,
emac_pps0, emac_pps1, ext_dbg, gcc_gp1, gcc_gp2, gcc_gp3,
gcc_plltest, gpio, i2s_mclk, jitter_bist, ldo_en, ldo_update,
mgpi_clk, m_voc, native_char, native_char0, native_char1,
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.