Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/renesas,rza2-pinctrl.yaml- Extension
.yaml- Size
- 2743 bytes
- Lines
- 99
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/pinctrl/r7s9210-pinctrl.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/renesas,rza2-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/A2 combined Pin and GPIO controller
maintainers:
- Chris Brandt <chris.brandt@renesas.com>
- Geert Uytterhoeven <geert+renesas@glider.be>
description:
The Renesas SoCs of the RZ/A2 series feature a combined Pin and GPIO
controller.
Pin multiplexing and GPIO configuration is performed on a per-pin basis.
Each port features up to 8 pins, each of them configurable for GPIO function
(port mode) or in alternate function mode.
Up to 8 different alternate function modes exist for each single pin.
properties:
compatible:
const: renesas,r7s9210-pinctrl # RZ/A2M
reg:
maxItems: 1
gpio-controller: true
'#gpio-cells':
const: 2
description:
The first cell contains the global GPIO port index, constructed using the
RZA2_PIN() helper macro in r7s9210-pinctrl.h.
E.g. "RZA2_PIN(PORT6, 0)" for P6_0.
gpio-ranges:
maxItems: 1
additionalProperties:
type: object
allOf:
- $ref: pincfg-node.yaml#
- $ref: pinmux-node.yaml#
description:
The child nodes of the pin controller designate pins to be used for
specific peripheral functions or as GPIO.
A pin multiplexing sub-node describes how to configure a set of
(or a single) pin in some desired alternate function mode.
The values for the pinmux properties are a combination of port name,
pin number and the desired function index. Use the RZA2_PINMUX macro
located in include/dt-bindings/pinctrl/r7s9210-pinctrl.h to easily
define these.
For assigning GPIO pins, use the macro RZA2_PIN also in
to express the desired port pin.
properties:
pinmux:
description:
Values are constructed from GPIO port number, pin number, and
alternate function configuration number using the RZA2_PINMUX()
helper macro in r7s9210-pinctrl.h.
required:
- pinmux
additionalProperties: false
Annotation
- Immediate include surface: `dt-bindings/pinctrl/r7s9210-pinctrl.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.