Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-gpio-bank.yaml- Extension
.yaml- Size
- 1379 bytes
- Lines
- 53
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-gpio-bank.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung S3C/S5P/Exynos SoC pin controller - gpio bank
maintainers:
- Krzysztof Kozlowski <krzk@kernel.org>
- Sylwester Nawrocki <s.nawrocki@samsung.com>
- Tomasz Figa <tomasz.figa@gmail.com>
description: |
This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
controller.
GPIO bank description for Samsung S3C/S5P/Exynos SoC pin controller.
See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for
additional information and example.
properties:
'#gpio-cells':
const: 2
gpio-controller: true
'#interrupt-cells':
description:
For GPIO banks supporting external GPIO interrupts or external wake-up
interrupts.
const: 2
interrupt-controller:
description:
For GPIO banks supporting external GPIO interrupts or external wake-up
interrupts.
interrupts:
description:
For GPIO banks supporting direct external wake-up interrupts (without
multiplexing). Number of interrupts must match number of wake-up capable
pins of this bank.
minItems: 1
maxItems: 8
required:
- '#gpio-cells'
- gpio-controller
additionalProperties: false
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.