Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/samsung,pinctrl-pins-cfg.yaml- Extension
.yaml- Size
- 2811 bytes
- Lines
- 81
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/samsung,pinctrl-pins-cfg.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung S3C/S5P/Exynos SoC pin controller - pins configuration
maintainers:
- Krzysztof Kozlowski <krzk@kernel.org>
- Sylwester Nawrocki <s.nawrocki@samsung.com>
- Tomasz Figa <tomasz.figa@gmail.com>
description: |
This is a part of device tree bindings for Samsung S3C/S5P/Exynos SoC pin
controller.
Pins configuration for Samsung S3C/S5P/Exynos SoC pin controller.
The values used for config properties should be derived from the hardware
manual and these values are programmed as-is into the pin pull up/down and
driver strength register of the pin-controller.
See also Documentation/devicetree/bindings/pinctrl/samsung,pinctrl.yaml for
additional information and example.
properties:
samsung,pins:
description: |
List of pins to configure. For initial and sleep states, the maximum
number is one pin. In other cases there is no upper limit.
The pins should use lowercase names matching hardware manual, e.g. for
GPA0 bank: gpa0-0, gpa0-1, gpa0-2.
$ref: /schemas/types.yaml#/definitions/string-array
samsung,pin-function:
description: |
The pin function selection that should be applied on the pins listed in the
child node is specified using the "samsung,pin-function" property. The value
of this property that should be applied to each of the pins listed in the
"samsung,pins" property should be picked from the hardware manual of the SoC
for the specified pin group. This property is optional in the child node if
no specific function selection is desired for the pins listed in the child
node. The value of this property is used as-is to program the pin-controller
function selector register of the pin-bank.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
samsung,pin-drv:
description: Drive strength configuration.
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
maximum: 15
samsung,pin-pud:
description: Pull up/down configuration.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
samsung,pin-val:
description: Initial value of pin output buffer.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
samsung,pin-con-pdn:
description: Function in power down mode.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1, 2, 3]
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.