Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/pinctrl/starfive,jh7110-sys-pinctrl.yaml
Extension
.yaml
Size
3455 bytes
Lines
143
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/starfive,jh7110-sys-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: StarFive JH7110 SYS Pin Controller

description: |
  Bindings for the JH7110 RISC-V SoC from StarFive Technology Ltd.

  Out of the SoC's many pins only the ones named PAD_GPIO0 to PAD_GPIO63
  can be multiplexed and have configurable bias, drive strength,
  schmitt trigger etc.
  Some peripherals have their I/O go through the 64 "GPIOs". This also
  includes a number of other UARTs, I2Cs, SPIs, PWMs etc.
  All these peripherals are connected to all 64 GPIOs such that
  any GPIO can be set up to be controlled by any of the peripherals.

maintainers:
  - Hal Feng <hal.feng@starfivetech.com>

properties:
  compatible:
    const: starfive,jh7110-sys-pinctrl

  reg:
    maxItems: 1

  clocks:
    maxItems: 1

  resets:
    maxItems: 1

  interrupts:
    maxItems: 1

  interrupt-controller: true

  '#interrupt-cells':
    const: 2

  gpio-controller: true

  '#gpio-cells':
    const: 2

patternProperties:
  '-[0-9]+$':
    type: object
    additionalProperties: false
    patternProperties:
      '-pins$':
        type: object
        description: |
          A pinctrl node should contain at least one subnode representing the
          pinctrl groups available on the machine. Each subnode will list the
          pins it needs, and how they should be configured, with regard to
          muxer configuration, bias, input enable/disable, input schmitt
          trigger enable/disable, slew-rate and drive strength.
        allOf:
          - $ref: /schemas/pinctrl/pincfg-node.yaml
          - $ref: /schemas/pinctrl/pinmux-node.yaml
        additionalProperties: false

        properties:
          pinmux:
            description: |
              The list of GPIOs and their mux settings that properties in the

Annotation

Implementation Notes