Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/pinctrl/ultrarisc,dp1000-pinctrl.yaml- Extension
.yaml- Size
- 3037 bytes
- Lines
- 131
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/pinctrl/ultrarisc,dp1000-pinctrl.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: UltraRISC DP1000 Pin Controller
maintainers:
- Jia Wang <wangjia@ultrarisc.com>
description: |
UltraRISC RISC-V SoC DP1000 pin controller.
The controller manages ports A, B, C, D and LPC. Ports A-D default to
GPIO and provide additional SPI, UART, I2C, and PWM mux functions.
LPC pins default to the LPC interface and can be muxed to eSPI.
All pins also support pin configuration, including drive strength,
pull-up, and pull-down settings.
properties:
compatible:
const: ultrarisc,dp1000-pinctrl
reg:
items:
- description: pin controller registers
required:
- compatible
- reg
patternProperties:
'.*-pins$':
type: object
unevaluatedProperties: false
allOf:
- $ref: /schemas/pinctrl/pincfg-node.yaml#
- $ref: /schemas/pinctrl/pinmux-node.yaml#
- if:
properties:
pins:
items:
minimum: 40
maximum: 52
then:
properties:
function:
enum:
- lpc
- espi
else:
properties:
pins:
items:
maximum: 39
function:
enum:
- gpio
- i2c
- pwm
- spi
- uart
properties:
pins:
description: |
List of pins affected by this state node, using numeric pin IDs.
Pins 0-39 correspond to ports A-D, and pins 40-52 correspond
to LPC0-LPC12.
$ref: /schemas/types.yaml#/definitions/uint32-array
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.