Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml

File Facts

System: Linux kernel
Corpus path: Documentation/devicetree/bindings/power/mediatek,mt8196-gpufreq.yaml
Extension: .yaml
Size: 3131 bytes
Lines: 131
Domain: Support Tooling And Documentation
Bucket: Documentation
Inferred role: Support Tooling And Documentation: configuration, schema, or hardware description
Status: atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

dt-bindings/clock/mediatek,mt8196-clock.h

Detected Declarations

No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/power/mediatek,mt8196-gpufreq.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: MediaTek MFlexGraphics Power and Frequency Controller

maintainers:
  - Nicolas Frattaroli <nicolas.frattaroli@collabora.com>

description:
  A special-purpose embedded MCU to control power and frequency of GPU devices
  using MediaTek Flexible Graphics integration hardware.

properties:
  $nodename:
    pattern: '^power-controller@[a-f0-9]+$'

  compatible:
    enum:
      - mediatek,mt8196-gpufreq

  reg:
    items:
      - description: GPR memory area
      - description: RPC memory area
      - description: SoC variant ID register

  reg-names:
    items:
      - const: gpr
      - const: rpc
      - const: hw-revision

  clocks:
    items:
      - description: main clock of the embedded controller (EB)
      - description: core PLL
      - description: stack 0 PLL
      - description: stack 1 PLL

  clock-names:
    items:
      - const: eb
      - const: core
      - const: stack0
      - const: stack1

  mboxes:
    items:
      - description: FastDVFS events
      - description: frequency control
      - description: sleep control
      - description: timer control
      - description: frequency hopping control
      - description: hardware voter control
      - description: FastDVFS control

  mbox-names:
    items:
      - const: fast-dvfs-event
      - const: gpufreq
      - const: sleep
      - const: timer
      - const: fhctl
      - const: ccf
      - const: fast-dvfs

  memory-region:

Annotation

Immediate include surface: `dt-bindings/clock/mediatek,mt8196-clock.h`.
Atlas domain: Support Tooling And Documentation / Documentation.
Implementation status: atlas-only.

Implementation Notes

This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.