Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/serial/nvidia,tegra264-utc.yaml- Extension
.yaml- Size
- 1702 bytes
- Lines
- 74
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/serial/nvidia,tegra264-utc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra UTC (UART Trace Controller) client
maintainers:
- Kartik Rajput <kkartik@nvidia.com>
- Thierry Reding <thierry.reding@gmail.com>
- Jonathan Hunter <jonathanh@nvidia.com>
description:
Represents a client interface of the Tegra UTC (UART Trace Controller). The
Tegra UTC allows multiple clients within the Tegra SoC to share a physical
UART interface. It supports up to 16 clients. Each client operates as an
independent UART endpoint with a dedicated interrupt and 128-character TX/RX
FIFOs.
The Tegra UTC clients use 8-N-1 configuration and operates on a baudrate
configured by the bootloader at the controller level.
allOf:
- $ref: serial.yaml#
properties:
compatible:
const: nvidia,tegra264-utc
reg:
items:
- description: TX region.
- description: RX region.
reg-names:
items:
- const: tx
- const: rx
interrupts:
maxItems: 1
tx-threshold:
minimum: 1
maximum: 128
rx-threshold:
minimum: 1
maximum: 128
required:
- compatible
- reg
- reg-names
- interrupts
- tx-threshold
- rx-threshold
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
tegra_utc: serial@c4e0000 {
compatible = "nvidia,tegra264-utc";
reg = <0xc4e0000 0x8000>, <0xc4e8000 0x8000>;
reg-names = "tx", "rx";
interrupts = <GIC_SPI 514 IRQ_TYPE_LEVEL_HIGH>;
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.