Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml- Extension
.yaml- Size
- 4123 bytes
- Lines
- 169
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/irq.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/reset/mt8135-resets.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mediatek PMIC Wrapper
maintainers:
- Flora Fu <flora.fu@mediatek.com>
- Alexandre Mergnat <amergnat@baylibre.com>
description:
On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface
is not directly visible to the CPU, but only through the PMIC wrapper
inside the SoC. The communication between the SoC and the PMIC can
optionally be encrypted. Also a non standard Dual IO SPI mode can be
used to increase speed.
IP Pairing
On MT8135 the pins of some SoC internal peripherals can be on the PMIC.
The signals of these pins are routed over the SPI bus using the pwrap
bridge. In the binding description below the properties needed for bridging
are marked with "IP Pairing". These are optional on SoCs which do not support
IP Pairing
properties:
compatible:
oneOf:
- items:
- enum:
- mediatek,mt2701-pwrap
- mediatek,mt6765-pwrap
- mediatek,mt6779-pwrap
- mediatek,mt6795-pwrap
- mediatek,mt6797-pwrap
- mediatek,mt6873-pwrap
- mediatek,mt7622-pwrap
- mediatek,mt8135-pwrap
- mediatek,mt8173-pwrap
- mediatek,mt8183-pwrap
- mediatek,mt8186-pwrap
- mediatek,mt8195-pwrap
- mediatek,mt8365-pwrap
- mediatek,mt8516-pwrap
- items:
- enum:
- mediatek,mt8186-pwrap
- mediatek,mt8195-pwrap
- const: syscon
- items:
- enum:
- mediatek,mt8188-pwrap
- mediatek,mt8189-pwrap
- const: mediatek,mt8195-pwrap
- const: syscon
reg:
minItems: 1
items:
- description: PMIC wrapper registers
- description: IP pairing registers
reg-names:
minItems: 1
items:
- const: pwrap
- const: pwrap-bridge
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/reset/mt8135-resets.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.