Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-irqmux.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-irqmux.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-irqmux.yaml
Extension
.yaml
Size
3817 bytes
Lines
108
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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Annotated Snippet

# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/microchip/microchip,mpfs-irqmux.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Microchip Polarfire SoC GPIO Interrupt Mux

maintainers:
  - Conor Dooley <conor.dooley@microchip.com>

description: |
  There are 3 GPIO controllers on this SoC, of which:
  - GPIO controller 0 has 14 GPIOs
  - GPIO controller 1 has 24 GPIOs
  - GPIO controller 2 has 32 GPIOs

  All GPIOs are capable of generating interrupts, for a total of 70.
  There are only 41 IRQs available however, so a configurable mux is used to
  ensure all GPIOs can be used for interrupt generation.
  38 of the 41 interrupts are in what the documentation calls "direct mode",
  as they provide an exclusive connection from a GPIO to the PLIC.
  Lines 18 to 23 on GPIO controller 1 are always in "direct mode".
  The 3 remaining interrupts are used to mux the interrupts which do not have
  a exclusive connection, one for each GPIO controller.

properties:
  compatible:
    oneOf:
      - items:
          - const: microchip,pic64gx-irqmux
          - const: microchip,mpfs-irqmux
      - const: microchip,mpfs-irqmux

  reg:
    maxItems: 1

  "#address-cells":
    const: 0

  "#interrupt-cells":
    const: 1

  interrupt-map-mask:
    items:
      - const: 0x7f

  interrupt-map:
    description: |
      Specifies the mapping from GPIO interrupt lines to plic interrupts.

      The child interrupt number set in arrays items is computed using the
      following formula:
          gpio_bank * 32 + gpio_number
      with:
        - gpio_bank: The GPIO bank number
            - 0 for GPIO0,
            - 1 for GPIO1,
            - 2 for GPIO2
        - gpio_number: Number of the gpio in the bank (0..31)
    maxItems: 70

required:
  - compatible
  - reg
  - "#address-cells"
  - "#interrupt-cells"
  - interrupt-map-mask
  - interrupt-map

Annotation

Implementation Notes