Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml- Extension
.yaml- Size
- 3443 bytes
- Lines
- 126
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/qcom/qcom,aoss-qmp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Always-On Subsystem side channel
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description:
This binding describes the hardware component responsible for side channel
requests to the always-on subsystem (AOSS), used for certain power management
requests that is not handled by the standard RPMh interface. Each client in the
SoC has its own block of message RAM and IRQ for communication with the AOSS.
The protocol used to communicate in the message RAM is known as Qualcomm
Messaging Protocol (QMP)
The AOSS side channel exposes control over a set of resources, used to control
a set of debug related clocks and to affect the low power state of resources
related to the secondary subsystems.
properties:
compatible:
items:
- enum:
- qcom,eliza-aoss-qmp
- qcom,glymur-aoss-qmp
- qcom,hawi-aoss-qmp
- qcom,kaanapali-aoss-qmp
- qcom,milos-aoss-qmp
- qcom,qcs615-aoss-qmp
- qcom,qcs8300-aoss-qmp
- qcom,qdu1000-aoss-qmp
- qcom,sa8255p-aoss-qmp
- qcom,sa8775p-aoss-qmp
- qcom,sar2130p-aoss-qmp
- qcom,sc7180-aoss-qmp
- qcom,sc7280-aoss-qmp
- qcom,sc8180x-aoss-qmp
- qcom,sc8280xp-aoss-qmp
- qcom,sdx75-aoss-qmp
- qcom,sdm845-aoss-qmp
- qcom,sm6350-aoss-qmp
- qcom,sm7150-aoss-qmp
- qcom,sm8150-aoss-qmp
- qcom,sm8250-aoss-qmp
- qcom,sm8350-aoss-qmp
- qcom,sm8450-aoss-qmp
- qcom,sm8550-aoss-qmp
- qcom,sm8650-aoss-qmp
- qcom,sm8750-aoss-qmp
- qcom,x1e80100-aoss-qmp
- const: qcom,aoss-qmp
reg:
maxItems: 1
description:
The base address and size of the message RAM for this client's
communication with the AOSS
interrupts:
maxItems: 1
description:
Should specify the AOSS message IRQ for this client
mboxes:
maxItems: 1
description:
Annotation
- Immediate include surface: `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.