Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml- Extension
.yaml- Size
- 4348 bytes
- Lines
- 171
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/qcom,gcc-sdm845.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/qcom/qcom,geni-se.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: GENI Serial Engine QUP Wrapper Controller
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
description: |
Generic Interface (GENI) based Qualcomm Universal Peripheral (QUP) wrapper
is a programmable module for supporting a wide range of serial interfaces
like UART, SPI, I2C, I3C, etc. A single QUP module can provide upto 8 Serial
Interfaces, using its internal Serial Engines. The GENI Serial Engine QUP
Wrapper controller is modeled as a node with zero or more child nodes each
representing a serial engine.
properties:
compatible:
enum:
- qcom,geni-se-qup
- qcom,geni-se-i2c-master-hub
reg:
description: QUP wrapper common register address and length.
maxItems: 1
clock-names:
minItems: 1
maxItems: 2
clocks:
minItems: 1
maxItems: 2
"#address-cells":
const: 2
"#size-cells":
const: 2
ranges: true
interconnects:
maxItems: 1
interconnect-names:
const: qup-core
iommus:
maxItems: 1
dma-coherent: true
firmware-name:
maxItems: 1
description: Specify the name of the QUP firmware to load.
required:
- compatible
- reg
- clock-names
- clocks
- "#address-cells"
- "#size-cells"
- ranges
patternProperties:
Annotation
- Immediate include surface: `dt-bindings/clock/qcom,gcc-sdm845.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.