Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/soc/tegra/nvidia,tegra20-pmc.yaml
Extension
.yaml
Size
14890 bytes
Lines
417
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/soc/tegra/nvidia,tegra20-pmc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Tegra Power Management Controller (PMC)

maintainers:
  - Thierry Reding <thierry.reding@gmail.com>
  - Jonathan Hunter <jonathanh@nvidia.com>

properties:
  compatible:
    enum:
      - nvidia,tegra20-pmc
      - nvidia,tegra30-pmc
      - nvidia,tegra114-pmc
      - nvidia,tegra124-pmc
      - nvidia,tegra210-pmc

  reg:
    maxItems: 1

  clock-names:
    items:
      # Tegra clock of the same name
      - const: pclk
      # 32 KHz clock input
      - const: clk32k_in

  clocks:
    maxItems: 2

  '#clock-cells':
    const: 1
    description: |
      Tegra PMC has clk_out_1, clk_out_2, and clk_out_3. PMC also has blink
      control which allows 32Khz clock output to Tegra blink pad.

      Consumer of PMC clock should specify the desired clock by having the
      clock ID in its "clocks" phandle cell with PMC clock provider. See
      include/dt-bindings/soc/tegra-pmc.h for the list of Tegra PMC clock IDs.

  '#interrupt-cells':
    const: 2
    description: Specifies number of cells needed to encode an interrupt
      source.

  interrupt-controller: true

  nvidia,invert-interrupt:
    $ref: /schemas/types.yaml#/definitions/flag
    description: Inverts the PMU interrupt signal. The PMU is an external Power
      Management Unit, whose interrupt output signal is fed into the PMC. This
      signal is optionally inverted, and then fed into the ARM GIC. The PMC is
      not involved in the detection or handling of this interrupt signal,
      merely its inversion.

  nvidia,core-power-req-active-high:
    $ref: /schemas/types.yaml#/definitions/flag
    description: core power request active-high

  nvidia,sys-clock-req-active-high:
    $ref: /schemas/types.yaml#/definitions/flag
    description: system clock request active-high

  nvidia,combined-power-req:
    $ref: /schemas/types.yaml#/definitions/flag
    description: combined power request for CPU and core

Annotation

Implementation Notes