Documentation/devicetree/bindings/soc/ti/keystone-navigator-qmss.txt
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/soc/ti/keystone-navigator-qmss.txt
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/soc/ti/keystone-navigator-qmss.txt- Extension
.txt- Size
- 8303 bytes
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- 239
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: documentation
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
The QMSS (Queue Manager Sub System) found on Keystone SOCs is one of
the main hardware sub system which forms the backbone of the Keystone
multi-core Navigator. QMSS consist of queue managers, packed-data structure
processors(PDSP), linking RAM, descriptor pools and infrastructure
Packet DMA.
The Queue Manager is a hardware module that is responsible for accelerating
management of the packet queues. Packets are queued/de-queued by writing or
reading descriptor address to a particular memory mapped location. The PDSPs
perform QMSS related functions like accumulation, QoS, or event management.
Linking RAM registers are used to link the descriptors which are stored in
descriptor RAM. Descriptor RAM is configurable as internal or external memory.
The QMSS driver manages the PDSP setups, linking RAM regions,
queue pool management (allocation, push, pop and notify) and descriptor
pool management.
Required properties:
- compatible : Must be "ti,keystone-navigator-qmss".
: Must be "ti,66ak2g-navss-qm" for QMSS on K2G SoC.
- clocks : phandle to the reference clock for this device.
- queue-range : <start number> total range of queue numbers for the device.
- linkram0 : <address size> for internal link ram, where size is the total
link ram entries.
- linkram1 : <address size> for external link ram, where size is the total
external link ram entries. If the address is specified as "0"
driver will allocate memory.
- qmgrs : child node describing the individual queue managers on the
SoC. On keystone 1 devices there should be only one node.
On keystone 2 devices there can be more than 1 node.
-- managed-queues : the actual queues managed by each queue manager
instance, specified as <"base queue #" "# of queues">.
-- reg : Address and size of the register set for the device.
Register regions should be specified in the following
order
- Queue Peek region.
- Queue status RAM.
- Queue configuration region.
- Descriptor memory setup region.
- Queue Management/Queue Proxy region for queue Push.
- Queue Management/Queue Proxy region for queue Pop.
For QMSS on K2G SoC, following QM reg indexes are used in that order
- Queue Peek region.
- Queue configuration region.
- Queue Management/Queue Proxy region for queue Push/Pop.
- queue-pools : child node classifying the queue ranges into pools.
Queue ranges are grouped into 3 type of pools:
- qpend : pool of qpend(interruptible) queues
- general-purpose : pool of general queues, primarily used
as free descriptor queues or the
transmit DMA queues.
- accumulator : pool of queues on PDSP accumulator channel
Each range can have the following properties:
-- qrange : number of queues to use per queue range, specified as
<"base queue #" "# of queues">.
-- interrupts : Optional property to specify the interrupt mapping
for interruptible queues. The driver additionally sets
the interrupt affinity hint based on the cpu mask.
-- qalloc-by-id : Optional property to specify that the queues in this
range can only be allocated by queue id.
-- accumulator : Accumulator channel specification. Any of the PDSPs in
QMSS can be loaded with the accumulator firmware. The
accumulator firmware’s job is to poll a select number of
queues looking for descriptors that have been pushed
into them. Descriptors are popped from the queue and
placed in a buffer provided by the host. When the list
becomes full or a programmed time period expires, the
accumulator triggers an interrupt to the host to read
the buffer for descriptor information. This firmware
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.