Documentation/devicetree/bindings/sound/ti,j721e-cpb-ivi-audio.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/sound/ti,j721e-cpb-ivi-audio.yaml

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System
Linux kernel
Corpus path
Documentation/devicetree/bindings/sound/ti,j721e-cpb-ivi-audio.yaml
Extension
.yaml
Size
5127 bytes
Lines
146
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

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Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
# Copyright (C) 2020 Texas Instruments Incorporated
# Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/ti,j721e-cpb-ivi-audio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Texas Instruments J721e Common Processor Board Audio Support

maintainers:
  - Peter Ujfalusi <peter.ujfalusi@gmail.com>

description: |
  The Infotainment board plugs into the Common Processor Board, the support of the
  extension board is extending the CPB audio support, described in:
  sound/ti,j721e-cpb-audio.txt

  The audio support on the Infotainment Expansion Board consists of McASP0
  connected to two pcm3168a codecs with dedicated set of serializers to each.
  The SCKI for pcm3168a is sourced from j721e AUDIO_REFCLK0 pin.

  In order to support 48KHz and 44.1KHz family of sampling rates the parent clock
  for AUDIO_REFCLK0 needs to be changed between PLL4 (for 48KHz) and PLL15 (for
  44.1KHz). The same PLLs are used for McASP0's AUXCLK clock via different
  HSDIVIDER.

  Note: the same PLL4 and PLL15 is used by the audio support on the CPB!

  Clocking setup for 48KHz family:
  PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
        |                |-> MCASP0_AUXCLK  ---> McASP0.auxclk
        |
        |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2  ---> pcm3168a.SCKI
                         |-> AUDIO_REFCLK0  ---> pcm3168a_a/b.SCKI

  Clocking setup for 44.1KHz family:
  PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk
        |                  |-> MCASP0_AUXCLK  ---> McASP0.auxclk
        |
        |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2   ---> pcm3168a.SCKI
                          |-> AUDIO_REFCLK0   ---> pcm3168a_a/b.SCKI

properties:
  compatible:
    items:
      - const: ti,j721e-cpb-ivi-audio

  model:
    $ref: /schemas/types.yaml#/definitions/string
    description: User specified audio sound card name

  ti,cpb-mcasp:
    description: phandle to McASP used on CPB
    $ref: /schemas/types.yaml#/definitions/phandle

  ti,cpb-codec:
    description: phandle to the pcm3168a codec used on the CPB
    $ref: /schemas/types.yaml#/definitions/phandle

  ti,ivi-mcasp:
    description: phandle to McASP used on IVI
    $ref: /schemas/types.yaml#/definitions/phandle

  ti,ivi-codec-a:
    description: phandle to the pcm3168a-A codec on the expansion board
    $ref: /schemas/types.yaml#/definitions/phandle

  ti,ivi-codec-b:
    description: phandle to the pcm3168a-B codec on the expansion board

Annotation

Implementation Notes