Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/spmi/qcom,spmi-pmic-arb.yaml- Extension
.yaml- Size
- 2818 bytes
- Lines
- 114
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0-only
%YAML 1.2
---
$id: http://devicetree.org/schemas/spmi/qcom,spmi-pmic-arb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm SPMI Controller (PMIC Arbiter)
maintainers:
- Stephen Boyd <sboyd@kernel.org>
description: |
The SPMI PMIC Arbiter is found on Snapdragon chipsets. It is an SPMI
controller with wrapping arbitration logic to allow for multiple on-chip
devices to control a single SPMI master.
The PMIC Arbiter can also act as an interrupt controller, providing interrupts
to slave devices.
allOf:
- $ref: spmi.yaml
- $ref: qcom,spmi-pmic-arb-common.yaml
properties:
compatible:
const: qcom,spmi-pmic-arb
reg:
oneOf:
- items: # V1
- description: core registers
- description: interrupt controller registers
- description: configuration registers
- items: # V2
- description: core registers
- description: tx-channel per virtual slave regosters
- description: rx-channel (called observer) per virtual slave registers
- description: interrupt controller registers
- description: configuration registers
reg-names:
oneOf:
- items:
- const: core
- const: intr
- const: cnfg
- items:
- const: core
- const: chnls
- const: obsrvr
- const: intr
- const: cnfg
interrupts:
maxItems: 1
interrupt-names:
const: periph_irq
interrupt-controller: true
'#address-cells': true
'#interrupt-cells':
const: 4
description: |
cell 1: slave ID for the requested interrupt (0-15)
cell 2: peripheral ID for requested interrupt (0-255)
cell 3: the requested peripheral interrupt (0-7)
cell 4: interrupt flags indicating level-sense information,
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.