Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/thermal/renesas,r9a09g047-tsu.yaml- Extension
.yaml- Size
- 2934 bytes
- Lines
- 118
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/renesas,r9a09g047-cpg.hdt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/thermal/renesas,r9a09g047-tsu.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Renesas RZ/G3E Temperature Sensor Unit (TSU)
maintainers:
- John Madieu <john.madieu.xa@bp.renesas.com>
description:
The Temperature Sensor Unit (TSU) is an integrated thermal sensor that
monitors the chip temperature on the Renesas RZ/G3E SoC. The TSU provides
real-time temperature measurements for thermal management.
properties:
compatible:
oneOf:
- enum:
- renesas,r9a09g047-tsu # RZ/G3E
- renesas,r9a09g077-tsu # RZ/T2H
- items:
- enum:
- renesas,r9a09g056-tsu # RZ/V2N
- renesas,r9a09g057-tsu # RZ/V2H
- const: renesas,r9a09g047-tsu # RZ/G3E
- items:
- const: renesas,r9a09g087-tsu # RZ/N2H
- const: renesas,r9a09g077-tsu # RZ/T2H
reg:
maxItems: 1
clocks:
maxItems: 1
resets:
maxItems: 1
power-domains:
maxItems: 1
interrupts:
items:
- description: Conversion complete interrupt signal (pulse)
- description: Comparison result interrupt signal (level)
interrupt-names:
items:
- const: adi
- const: adcmpi
"#thermal-sensor-cells":
const: 0
renesas,tsu-trim:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to system controller
- description: offset of trim registers
description:
Phandle and offset to the system controller containing the TSU
calibration trim values. The offset points to the first trim register
(OTPTSU1TRMVAL0), with the second trim register (OTPTSU1TRMVAL1) located
at offset + 4.
required:
- compatible
Annotation
- Immediate include surface: `dt-bindings/clock/renesas,r9a09g047-cpg.h`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.