Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml- Extension
.yaml- Size
- 3237 bytes
- Lines
- 124
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/timer/arm,arch_timer_mmio.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM memory mapped architected timer
maintainers:
- Marc Zyngier <marc.zyngier@arm.com>
- Mark Rutland <mark.rutland@arm.com>
description: |+
ARM cores may have a memory mapped architected timer, which provides up to 8
frames with a physical and optional virtual timer per frame.
The memory mapped timer is attached to a GIC to deliver its interrupts via SPIs.
properties:
compatible:
items:
- enum:
- arm,armv7-timer-mem
reg:
maxItems: 1
description: The control frame base address
'#address-cells':
enum: [1, 2]
'#size-cells':
const: 1
ranges: true
clock-frequency:
description: The frequency of the main counter, in Hz. Should be present
only where necessary to work around broken firmware which does not configure
CNTFRQ on all CPUs to a uniform correct value. Use of this property is
strongly discouraged; fix your firmware unless absolutely impossible.
always-on:
type: boolean
description: If present, the timer is powered through an always-on power
domain, therefore it never loses context.
arm,cpu-registers-not-fw-configured:
type: boolean
description: Firmware does not initialize any of the generic timer CPU
registers, which contain their architecturally-defined reset values. Only
supported for 32-bit systems which follow the ARMv7 architected reset
values.
arm,no-tick-in-suspend:
type: boolean
description: The main counter does not tick when the system is in
low-power system suspend on some SoCs. This behavior does not match the
Architecture Reference Manual's specification that the system counter "must
be implemented in an always-on power domain."
patternProperties:
'^frame@[0-9a-f]+$':
type: object
additionalProperties: false
description: A timer node has up to 8 frame sub-nodes, each with the following properties.
properties:
frame-number:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.