Documentation/devicetree/bindings/timer/arm,arch_timer.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/timer/arm,arch_timer.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/timer/arm,arch_timer.yaml- Extension
.yaml- Size
- 3919 bytes
- Lines
- 124
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/timer/arm,arch_timer.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM architected timer
maintainers:
- Marc Zyngier <marc.zyngier@arm.com>
- Mark Rutland <mark.rutland@arm.com>
description: |+
The per-core architected timer is expected to deliver per-CPU interrupts
(commonly to a GIC to deliver its per-processor interrupts as PPIs).
properties:
compatible:
oneOf:
- items:
- const: arm,cortex-a15-timer
- const: arm,armv7-timer
- items:
- enum:
- arm,armv7-timer
- arm,armv8-timer
- items:
- const: arm,armv8-timer
- const: arm,armv7-timer
interrupts:
minItems: 2
items:
- description: EL1 secure physical timer irq, if EL3 is implemented
- description: EL1 non-secure physical timer irq
- description: EL1 virtual timer irq
- description: EL2 physical timer irq, if EL2 is implemented
- description: EL2 virtual timer irq, if FEAT_VHE is implemented
interrupt-names:
oneOf:
- minItems: 2
items:
- const: phys
- const: virt
- const: hyp-phys
- const: hyp-virt
- minItems: 3
items:
- const: sec-phys
- const: phys
- const: virt
- const: hyp-phys
- const: hyp-virt
clock-frequency:
description: The frequency of the main counter, in Hz. Should be present
only where necessary to work around broken firmware which does not configure
CNTFRQ on all CPUs to a uniform correct value. Use of this property is
strongly discouraged; fix your firmware unless absolutely impossible.
always-on:
type: boolean
description: If present, the timer is powered through an always-on power
domain, therefore it never loses context.
allwinner,erratum-unknown1:
type: boolean
description: Indicates the presence of an erratum found in Allwinner SoCs,
where reading certain values from the counter is unreliable. This also
affects writes to the tval register, due to the implicit counter read.
Annotation
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.