Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml
File Facts
- System
- Linux kernel
- Corpus path
Documentation/devicetree/bindings/usb/nvidia,tegra234-xusb.yaml- Extension
.yaml- Size
- 5675 bytes
- Lines
- 187
- Domain
- Support Tooling And Documentation
- Bucket
- Documentation
- Inferred role
- Support Tooling And Documentation: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
- Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.
Dependency Surface
dt-bindings/clock/tegra234-clock.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/memory/tegra234-mc.hdt-bindings/power/tegra234-powergate.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/nvidia,tegra234-xusb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: NVIDIA Tegra234 xHCI controller
maintainers:
- Thierry Reding <thierry.reding@gmail.com>
- Jon Hunter <jonathanh@nvidia.com>
description: |
The Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by
the Tegra XUSB pad controller. The xHCI controller controls up to eight
ports; there are four USB 2.0 ports and four USB 3.2 Gen1 x1 ports.
properties:
compatible:
const: nvidia,tegra234-xusb
reg:
items:
- description: xHCI host registers
- description: XUSB FPCI registers
- description: XUSB bar2 registers
reg-names:
items:
- const: hcd
- const: fpci
- const: bar2
interrupts:
minItems: 2
items:
- description: xHCI host interrupt
- description: mailbox interrupt
- description: USB wake event 0
- description: USB wake event 1
- description: USB wake event 2
- description: USB wake event 3
- description: USB wake event 4
- description: USB wake event 5
- description: USB wake event 6
description: |
The first two interrupts are required for the USB host controller. The
remaining USB wake event interrupts are optional. Each USB wake event is
independent; it is not necessary to use all of these events on a
platform. The USB host controller can function even if no wake-up events
are defined. The USB wake event interrupts are handled by the Tegra PMC;
hence, the interrupt controller for these is the PMC and the interrupt
IDs correspond to the PMC wake event IDs. A complete list of wake event
IDs is provided below, and this information is also present in the Tegra
TRM document.
PMC wake-up 76 for USB3 port 0 wakeup
PMC wake-up 77 for USB3 port 1 wakeup
PMC wake-up 78 for USB3 port 2 and port 3 wakeup
PMC wake-up 79 for USB2 port 0 wakeup
PMC wake-up 80 for USB2 port 1 wakeup
PMC wake-up 81 for USB2 port 2 wakeup
PMC wake-up 82 for USB2 port 3 wakeup
clocks:
items:
- description: XUSB host clock
- description: XUSB Falcon source clock
- description: XUSB SuperSpeed clock
- description: XUSB SuperSpeed source clock
Annotation
- Immediate include surface: `dt-bindings/clock/tegra234-clock.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/memory/tegra234-mc.h`, `dt-bindings/power/tegra234-powergate.h`.
- Atlas domain: Support Tooling And Documentation / Documentation.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.