Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml

Source file repositories/reference/linux-study-clean/Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml

File Facts

System
Linux kernel
Corpus path
Documentation/devicetree/bindings/usb/rockchip,dwc3.yaml
Extension
.yaml
Size
3952 bytes
Lines
182
Domain
Support Tooling And Documentation
Bucket
Documentation
Inferred role
Support Tooling And Documentation: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

Repository support layer: documentation, build tooling, samples, user-space helper tools, generated initramfs support, licenses, and validation utilities.

Dependency Surface

Detected Declarations

Annotated Snippet

# SPDX-License-Identifier: GPL-2.0
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/rockchip,dwc3.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: Rockchip SuperSpeed DWC3 USB SoC controller

maintainers:
  - Heiko Stuebner <heiko@sntech.de>

description:
  The common content of the node is defined in snps,dwc3.yaml.

  Phy documentation is provided in the following places.

  USB2.0 PHY
  Documentation/devicetree/bindings/phy/rockchip,inno-usb2phy.yaml

  Type-C PHY
  Documentation/devicetree/bindings/phy/rockchip,rk3399-typec-phy.yaml

select:
  properties:
    compatible:
      contains:
        enum:
          - rockchip,rk3328-dwc3
          - rockchip,rk3562-dwc3
          - rockchip,rk3568-dwc3
          - rockchip,rk3576-dwc3
          - rockchip,rk3588-dwc3
  required:
    - compatible

properties:
  compatible:
    items:
      - enum:
          - rockchip,rk3328-dwc3
          - rockchip,rk3562-dwc3
          - rockchip,rk3568-dwc3
          - rockchip,rk3576-dwc3
          - rockchip,rk3588-dwc3
      - const: snps,dwc3

  reg:
    maxItems: 1

  interrupts:
    maxItems: 1

  clocks:
    minItems: 3
    items:
      - description:
          Controller reference clock, must to be 24 MHz
      - description:
          Controller suspend clock, must to be 24 MHz or 32 KHz
      - description:
          Master/Core clock, must to be >= 62.5 MHz for SS
          operation and >= 30MHz for HS operation
      - description:
          Controller grf clock OR UTMI clock
      - description:
          PIPE clock

  clock-names:
    minItems: 3
    items:

Annotation

Implementation Notes